Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 1 | /* |
Venkatesh Yadav Abbarapu | 17a12ce | 2020-11-27 08:42:14 -0700 | [diff] [blame] | 2 | * Copyright (c) 2018-2021, ARM Limited and Contributors. All rights reserved. |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <assert.h> |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 8 | #include <errno.h> |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 9 | #include <plat_arm.h> |
Tejas Patel | 6940996 | 2018-12-14 00:55:29 -0800 | [diff] [blame] | 10 | #include <plat_private.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 11 | #include <bl31/bl31.h> |
| 12 | #include <common/bl_common.h> |
| 13 | #include <common/debug.h> |
Venkatesh Yadav Abbarapu | 17a12ce | 2020-11-27 08:42:14 -0700 | [diff] [blame] | 14 | #include <drivers/arm/dcc.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 15 | #include <drivers/arm/pl011.h> |
| 16 | #include <drivers/console.h> |
Venkatesh Yadav Abbarapu | 9156ffd | 2020-01-22 21:23:20 -0700 | [diff] [blame] | 17 | #include <lib/mmio.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 18 | #include <lib/xlat_tables/xlat_tables.h> |
| 19 | #include <plat/common/platform.h> |
Venkatesh Yadav Abbarapu | 9156ffd | 2020-01-22 21:23:20 -0700 | [diff] [blame] | 20 | #include <versal_def.h> |
| 21 | #include <plat_private.h> |
| 22 | #include <plat_startup.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 23 | |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 24 | static entry_point_info_t bl32_image_ep_info; |
| 25 | static entry_point_info_t bl33_image_ep_info; |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 26 | |
| 27 | /* |
| 28 | * Return a pointer to the 'entry_point_info' structure of the next image for |
| 29 | * the security state specified. BL33 corresponds to the non-secure image type |
| 30 | * while BL32 corresponds to the secure image type. A NULL pointer is returned |
| 31 | * if the image does not exist. |
| 32 | */ |
| 33 | entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) |
| 34 | { |
| 35 | assert(sec_state_is_valid(type)); |
| 36 | |
Venkatesh Yadav Abbarapu | 5f115db | 2021-01-10 20:40:16 -0700 | [diff] [blame] | 37 | if (type == NON_SECURE) { |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 38 | return &bl33_image_ep_info; |
Venkatesh Yadav Abbarapu | 5f115db | 2021-01-10 20:40:16 -0700 | [diff] [blame] | 39 | } |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 40 | |
| 41 | return &bl32_image_ep_info; |
| 42 | } |
| 43 | |
| 44 | /* |
Venkatesh Yadav Abbarapu | 9156ffd | 2020-01-22 21:23:20 -0700 | [diff] [blame] | 45 | * Set the build time defaults,if we can't find any config data. |
| 46 | */ |
| 47 | static inline void bl31_set_default_config(void) |
| 48 | { |
| 49 | bl32_image_ep_info.pc = BL32_BASE; |
| 50 | bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry(); |
| 51 | bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); |
| 52 | bl33_image_ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX, |
| 53 | DISABLE_ALL_EXCEPTIONS); |
| 54 | } |
| 55 | |
| 56 | /* |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 57 | * Perform any BL31 specific platform actions. Here is an opportunity to copy |
| 58 | * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they |
| 59 | * are lost (potentially). This needs to be done before the MMU is initialized |
| 60 | * so that the memory layout can be used while creating page tables. |
| 61 | */ |
| 62 | void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, |
| 63 | u_register_t arg2, u_register_t arg3) |
| 64 | { |
Venkatesh Yadav Abbarapu | 9156ffd | 2020-01-22 21:23:20 -0700 | [diff] [blame] | 65 | uint64_t atf_handoff_addr; |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 66 | |
Venkatesh Yadav Abbarapu | 17a12ce | 2020-11-27 08:42:14 -0700 | [diff] [blame] | 67 | if (VERSAL_CONSOLE_IS(pl011)) { |
| 68 | static console_t versal_runtime_console; |
| 69 | /* Initialize the console to provide early debug support */ |
| 70 | int rc = console_pl011_register(VERSAL_UART_BASE, |
| 71 | VERSAL_UART_CLOCK, |
| 72 | VERSAL_UART_BAUDRATE, |
| 73 | &versal_runtime_console); |
| 74 | if (rc == 0) { |
| 75 | panic(); |
| 76 | } |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 77 | |
Venkatesh Yadav Abbarapu | 17a12ce | 2020-11-27 08:42:14 -0700 | [diff] [blame] | 78 | console_set_scope(&versal_runtime_console, CONSOLE_FLAG_BOOT | |
| 79 | CONSOLE_FLAG_RUNTIME); |
| 80 | } else if (VERSAL_CONSOLE_IS(dcc)) { |
| 81 | /* Initialize the dcc console for debug */ |
| 82 | int rc = console_dcc_register(); |
| 83 | if (rc == 0) { |
| 84 | panic(); |
| 85 | } |
Abhyuday Godhasara | 4c1a705 | 2021-08-11 02:52:35 -0700 | [diff] [blame] | 86 | } else { |
| 87 | NOTICE("BL31: Did not register for any console.\n"); |
Venkatesh Yadav Abbarapu | 17a12ce | 2020-11-27 08:42:14 -0700 | [diff] [blame] | 88 | } |
Abhyuday Godhasara | 4c1a705 | 2021-08-11 02:52:35 -0700 | [diff] [blame] | 89 | |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 90 | /* Initialize the platform config for future decision making */ |
| 91 | versal_config_setup(); |
| 92 | /* There are no parameters from BL2 if BL31 is a reset vector */ |
| 93 | assert(arg0 == 0U); |
| 94 | assert(arg1 == 0U); |
| 95 | |
| 96 | /* |
| 97 | * Do initial security configuration to allow DRAM/device access. On |
| 98 | * Base VERSAL only DRAM security is programmable (via TrustZone), but |
| 99 | * other platforms might have more programmable security devices |
| 100 | * present. |
| 101 | */ |
| 102 | |
| 103 | /* Populate common information for BL32 and BL33 */ |
| 104 | SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); |
| 105 | SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); |
| 106 | SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); |
| 107 | SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); |
| 108 | |
Venkatesh Yadav Abbarapu | 9156ffd | 2020-01-22 21:23:20 -0700 | [diff] [blame] | 109 | atf_handoff_addr = mmio_read_32(PMC_GLOBAL_GLOB_GEN_STORAGE4); |
| 110 | enum fsbl_handoff ret = fsbl_atf_handover(&bl32_image_ep_info, |
| 111 | &bl33_image_ep_info, |
| 112 | atf_handoff_addr); |
Venkatesh Yadav Abbarapu | ef75de0 | 2020-11-23 03:29:51 -0800 | [diff] [blame] | 113 | if (ret == FSBL_HANDOFF_NO_STRUCT || ret == FSBL_HANDOFF_INVAL_STRUCT) { |
Venkatesh Yadav Abbarapu | 9156ffd | 2020-01-22 21:23:20 -0700 | [diff] [blame] | 114 | bl31_set_default_config(); |
| 115 | } else if (ret != FSBL_HANDOFF_SUCCESS) { |
| 116 | panic(); |
Abhyuday Godhasara | 4c1a705 | 2021-08-11 02:52:35 -0700 | [diff] [blame] | 117 | } else { |
| 118 | ERROR("BL31: Error during fsbl-atf handover %d.\n", ret); |
Venkatesh Yadav Abbarapu | 9156ffd | 2020-01-22 21:23:20 -0700 | [diff] [blame] | 119 | } |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 120 | |
| 121 | NOTICE("BL31: Secure code at 0x%lx\n", bl32_image_ep_info.pc); |
| 122 | NOTICE("BL31: Non secure code at 0x%lx\n", bl33_image_ep_info.pc); |
| 123 | } |
| 124 | |
Shubhrajyoti Datta | abf6122 | 2021-03-17 23:01:17 +0530 | [diff] [blame] | 125 | static interrupt_type_handler_t type_el3_interrupt_handler; |
| 126 | |
| 127 | int request_intr_type_el3(uint32_t id, interrupt_type_handler_t handler) |
| 128 | { |
| 129 | /* Validate 'handler'*/ |
| 130 | if (!handler) { |
| 131 | return -EINVAL; |
| 132 | } |
| 133 | |
| 134 | type_el3_interrupt_handler = handler; |
| 135 | |
| 136 | return 0; |
| 137 | } |
| 138 | |
| 139 | static uint64_t rdo_el3_interrupt_handler(uint32_t id, uint32_t flags, |
| 140 | void *handle, void *cookie) |
| 141 | { |
| 142 | uint32_t intr_id; |
| 143 | interrupt_type_handler_t handler; |
| 144 | |
| 145 | intr_id = plat_ic_get_pending_interrupt_id(); |
| 146 | /* Currently we support one interrupt */ |
| 147 | if (intr_id != PLAT_VERSAL_IPI_IRQ) { |
| 148 | WARN("Unexpected interrupt call: 0x%x\n", intr_id); |
| 149 | return 0; |
| 150 | } |
| 151 | |
| 152 | handler = type_el3_interrupt_handler; |
| 153 | if (handler) { |
| 154 | return handler(intr_id, flags, handle, cookie); |
| 155 | } |
| 156 | |
| 157 | return 0; |
| 158 | } |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 159 | void bl31_platform_setup(void) |
| 160 | { |
| 161 | /* Initialize the gic cpu and distributor interfaces */ |
| 162 | plat_versal_gic_driver_init(); |
| 163 | plat_versal_gic_init(); |
| 164 | } |
| 165 | |
| 166 | void bl31_plat_runtime_setup(void) |
| 167 | { |
Shubhrajyoti Datta | abf6122 | 2021-03-17 23:01:17 +0530 | [diff] [blame] | 168 | uint64_t flags = 0; |
| 169 | uint64_t rc; |
| 170 | |
| 171 | set_interrupt_rm_flag(flags, NON_SECURE); |
| 172 | rc = register_interrupt_type_handler(INTR_TYPE_EL3, |
| 173 | rdo_el3_interrupt_handler, flags); |
| 174 | if (rc) { |
| 175 | panic(); |
| 176 | } |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 177 | } |
| 178 | |
| 179 | /* |
| 180 | * Perform the very early platform specific architectural setup here. |
| 181 | */ |
| 182 | void bl31_plat_arch_setup(void) |
| 183 | { |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 184 | plat_arm_interconnect_init(); |
| 185 | plat_arm_interconnect_enter_coherency(); |
| 186 | |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 187 | const mmap_region_t bl_regions[] = { |
| 188 | MAP_REGION_FLAT(BL31_BASE, BL31_END - BL31_BASE, |
| 189 | MT_MEMORY | MT_RW | MT_SECURE), |
| 190 | MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE, |
| 191 | MT_CODE | MT_SECURE), |
| 192 | MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_BASE, |
| 193 | MT_RO_DATA | MT_SECURE), |
| 194 | MAP_REGION_FLAT(BL_COHERENT_RAM_BASE, |
| 195 | BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE, |
| 196 | MT_DEVICE | MT_RW | MT_SECURE), |
| 197 | {0} |
| 198 | }; |
| 199 | |
| 200 | setup_page_tables(bl_regions, plat_versal_get_mmap()); |
| 201 | enable_mmu_el3(0); |
| 202 | } |