developer | 550bf5e | 2016-07-11 16:05:23 +0800 | [diff] [blame] | 1 | /* |
Antonio Nino Diaz | 42eef85 | 2018-09-24 17:15:54 +0100 | [diff] [blame] | 2 | * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. |
developer | 550bf5e | 2016-07-11 16:05:23 +0800 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
developer | 550bf5e | 2016-07-11 16:05:23 +0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <gicv2.h> |
Antonio Nino Diaz | 42eef85 | 2018-09-24 17:15:54 +0100 | [diff] [blame] | 8 | #include <interrupt_props.h> |
developer | 550bf5e | 2016-07-11 16:05:23 +0800 | [diff] [blame] | 9 | #include <platform.h> |
| 10 | #include <platform_def.h> |
| 11 | |
Antonio Nino Diaz | 42eef85 | 2018-09-24 17:15:54 +0100 | [diff] [blame] | 12 | static const interrupt_prop_t g0_interrupt_props[] = { |
| 13 | INTR_PROP_DESC(FIQ_SMP_CALL_SGI, GIC_HIGHEST_SEC_PRIORITY, |
| 14 | GICV2_INTR_GROUP0, GIC_INTR_CFG_LEVEL), |
developer | 550bf5e | 2016-07-11 16:05:23 +0800 | [diff] [blame] | 15 | }; |
| 16 | |
| 17 | gicv2_driver_data_t arm_gic_data = { |
| 18 | .gicd_base = BASE_GICD_BASE, |
| 19 | .gicc_base = BASE_GICC_BASE, |
Antonio Nino Diaz | 42eef85 | 2018-09-24 17:15:54 +0100 | [diff] [blame] | 20 | .interrupt_props = g0_interrupt_props, |
| 21 | .interrupt_props_num = ARRAY_SIZE(g0_interrupt_props), |
developer | 550bf5e | 2016-07-11 16:05:23 +0800 | [diff] [blame] | 22 | }; |
| 23 | |
| 24 | void plat_mt_gic_driver_init(void) |
| 25 | { |
| 26 | gicv2_driver_init(&arm_gic_data); |
| 27 | } |
| 28 | |
| 29 | void plat_mt_gic_init(void) |
| 30 | { |
| 31 | gicv2_distif_init(); |
| 32 | gicv2_pcpu_distif_init(); |
| 33 | gicv2_cpuif_enable(); |
| 34 | } |
| 35 | |
| 36 | void plat_mt_gic_cpuif_enable(void) |
| 37 | { |
| 38 | gicv2_cpuif_enable(); |
| 39 | } |
| 40 | |
| 41 | void plat_mt_gic_cpuif_disable(void) |
| 42 | { |
| 43 | gicv2_cpuif_disable(); |
| 44 | } |
| 45 | |
| 46 | void plat_mt_gic_pcpu_init(void) |
| 47 | { |
| 48 | gicv2_pcpu_distif_init(); |
| 49 | } |