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Varun Wadekar28dcc212016-07-20 10:28:51 -07001/*
Antonio Nino Diaz4b32e622018-08-16 16:52:57 +01002 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
Varun Wadekar28dcc212016-07-20 10:28:51 -07003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Varun Wadekar28dcc212016-07-20 10:28:51 -07005 */
6
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00007#ifndef TEGRA_PLATFORM_H
8#define TEGRA_PLATFORM_H
Varun Wadekar28dcc212016-07-20 10:28:51 -07009
Antonio Nino Diaz4b32e622018-08-16 16:52:57 +010010#include <cdefs.h>
Ambroise Vincentffbf32a2019-03-28 09:01:18 +000011#include <lib/utils_def.h>
Anthony Zhou70262ef2017-03-22 14:37:04 +080012#include <stdbool.h>
Marvin Hsu589a7e12017-04-12 20:40:27 +080013
14/*******************************************************************************
15 * Tegra major, minor version helper macros
16 ******************************************************************************/
17#define MAJOR_VERSION_SHIFT U(0x4)
18#define MAJOR_VERSION_MASK U(0xF)
19#define MINOR_VERSION_SHIFT U(0x10)
20#define MINOR_VERSION_MASK U(0xF)
21#define CHIP_ID_SHIFT U(8)
22#define CHIP_ID_MASK U(0xFF)
23#define PRE_SI_PLATFORM_SHIFT U(0x14)
24#define PRE_SI_PLATFORM_MASK U(0xF)
Varun Wadekar28dcc212016-07-20 10:28:51 -070025
Harvey Hsieh6dc0d762017-04-24 19:35:51 +080026/*******************************************************************************
Marvin Hsu589a7e12017-04-12 20:40:27 +080027 * Tegra chip ID values
Harvey Hsieh6dc0d762017-04-24 19:35:51 +080028 ******************************************************************************/
29#define TEGRA_CHIPID_TEGRA13 U(0x13)
30#define TEGRA_CHIPID_TEGRA21 U(0x21)
31#define TEGRA_CHIPID_TEGRA18 U(0x18)
32
Julius Werner53456fc2019-07-09 13:49:11 -070033#ifndef __ASSEMBLER__
Harvey Hsieh6dc0d762017-04-24 19:35:51 +080034
35/*
36 * Tegra chip ID major/minor identifiers
Varun Wadekarfc9b91e2017-03-10 09:53:37 -080037 */
38uint32_t tegra_get_chipid_major(void);
39uint32_t tegra_get_chipid_minor(void);
40
41/*
Marvin Hsu589a7e12017-04-12 20:40:27 +080042 * Tegra chip ID identifiers
Varun Wadekar28dcc212016-07-20 10:28:51 -070043 */
Marvin Hsu589a7e12017-04-12 20:40:27 +080044bool tegra_chipid_is_t132(void);
45bool tegra_chipid_is_t186(void);
46bool tegra_chipid_is_t210(void);
47bool tegra_chipid_is_t210_b01(void);
Varun Wadekarfdcdfe22017-04-13 14:12:49 -070048
Varun Wadekar28dcc212016-07-20 10:28:51 -070049/*
50 * Tegra platform identifiers
51 */
Anthony Zhou70262ef2017-03-22 14:37:04 +080052bool tegra_platform_is_silicon(void);
53bool tegra_platform_is_qt(void);
54bool tegra_platform_is_emulation(void);
55bool tegra_platform_is_linsim(void);
56bool tegra_platform_is_fpga(void);
57bool tegra_platform_is_unit_fpga(void);
58bool tegra_platform_is_virt_dev_kit(void);
Varun Wadekar28dcc212016-07-20 10:28:51 -070059
Julius Werner53456fc2019-07-09 13:49:11 -070060#endif /* __ASSEMBLER__ */
Harvey Hsieh6dc0d762017-04-24 19:35:51 +080061
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +000062#endif /* TEGRA_PLATFORM_H */