blob: 2b23daf39c55935951e31581d40582385afc959a [file] [log] [blame]
Yann Gautierf03dee52020-02-25 17:08:10 +01001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
Yann Gautier32409c72023-03-02 11:50:07 +01003 * Copyright (c) 2022-2023, STMicroelectronics - All Rights Reserved
Yann Gautierf03dee52020-02-25 17:08:10 +01004 */
5
Yann Gautier5c14e6b2023-04-06 18:14:41 +02006/omit-if-no-ref/ &i2c4_pins_a;
7/omit-if-no-ref/ &sdmmc1_b4_pins_a;
8/omit-if-no-ref/ &sdmmc1_clk_pins_a;
9/omit-if-no-ref/ &sdmmc2_b4_pins_a;
10/omit-if-no-ref/ &sdmmc2_clk_pins_a;
11/omit-if-no-ref/ &uart4_pins_a;
12/omit-if-no-ref/ &uart8_pins_a;
13/omit-if-no-ref/ &usart1_pins_a;
14
Yann Gautierf03dee52020-02-25 17:08:10 +010015/ {
16 aliases {
17#if !STM32MP_EMMC && !STM32MP_SDMMC
18 /delete-property/ mmc0;
19 /delete-property/ mmc1;
20#endif
Yann Gautierf03dee52020-02-25 17:08:10 +010021 };
22
Yann Gautierf03dee52020-02-25 17:08:10 +010023 soc {
Yann Gautierf03dee52020-02-25 17:08:10 +010024#if !STM32MP_USB_PROGRAMMER
25 /delete-node/ usb-otg@49000000;
26#endif
Yann Gautierf03dee52020-02-25 17:08:10 +010027#if !STM32MP_RAW_NAND
28 /delete-node/ memory-controller@58002000;
29#endif
30#if !STM32MP_SPI_NAND && !STM32MP_SPI_NOR
31 /delete-node/ spi@58003000;
32#endif
33#if !STM32MP_EMMC && !STM32MP_SDMMC
34 /delete-node/ mmc@58005000;
35 /delete-node/ mmc@58007000;
36#endif
Yann Gautierf03dee52020-02-25 17:08:10 +010037#if !STM32MP_USB_PROGRAMMER
38 /delete-node/ usbh-ohci@5800c000;
39 /delete-node/ usbh-ehci@5800d000;
40#endif
Yann Gautierf03dee52020-02-25 17:08:10 +010041#if !STM32MP_USB_PROGRAMMER
42 /delete-node/ usbphyc@5a006000;
43#endif
Yann Gautierf03dee52020-02-25 17:08:10 +010044 };
Yann Gautier1010e532020-10-21 17:57:51 +020045
46 /*
47 * UUID's here are UUID RFC 4122 compliant meaning fieds are stored in
48 * network order (big endian)
49 */
50
51 st-io_policies {
52 fip-handles {
53 compatible = "st,io-fip-handle";
54 fw_cfg_uuid = "5807e16a-8459-47be-8ed5-648e8dddab0e";
55 bl32_uuid = "05d0e189-53dc-1347-8d2b-500a4b7a3e38";
56 bl32_extra1_uuid = "0b70c29b-2a5a-7840-9f65-0a5682738288";
57 bl32_extra2_uuid = "8ea87bb1-cfa2-3f4d-85fd-e7bba50220d9";
58 bl33_uuid = "d6d0eea7-fcea-d54b-9782-9934f234b6e4";
59 hw_cfg_uuid = "08b8f1d9-c9cf-9349-a962-6fbc6b7265cc";
60 tos_fw_cfg_uuid = "26257c1a-dbc6-7f47-8d96-c4c4b0248021";
Lionel Debieve563e7152022-10-06 08:51:32 +020061#if TRUSTED_BOARD_BOOT
62 stm32mp_cfg_cert_uuid = "501d8dd2-8bce-49a5-84eb-559a9f2eaeaf";
63 t_key_cert_uuid = "827ee890-f860-e411-a1b4-777a21b4f94c";
64 tos_fw_key_cert_uuid = "9477d603-fb60-e411-85dd-b7105b8cee04";
65 nt_fw_key_cert_uuid = "8ad5832a-fb60-e411-8aaf-df30bbc49859";
66 tos_fw_content_cert_uuid = "a49f4411-5e63-e411-8728-3f05722af33d";
67 nt_fw_content_cert_uuid = "8ec4c1f3-5d63-e411-a7a9-87ee40b23fa7";
68#endif
Yann Gautier1010e532020-10-21 17:57:51 +020069 };
70 };
Lionel Debieve563e7152022-10-06 08:51:32 +020071
72#if TRUSTED_BOARD_BOOT
73 tb_fw-config {
74 compatible = "arm,tb_fw";
75
76 /* Disable authentication for development */
77 disable_auth = <0x0>;
78
79 /* Use SRAM2 to manage the mbedTLS heap */
80 mbedtls_heap_addr = <0x0 0x30004000>; /* SRAM2_BASE */
81 mbedtls_heap_size = <0x2000>; /* SRAM2_SIZE */
82 };
83
84#include "stm32mp1-cot-descriptors.dtsi"
85#endif
86
Yann Gautierf03dee52020-02-25 17:08:10 +010087};