blob: d90952a83377a66560118e848048b3b0d552e184 [file] [log] [blame]
rutigl@gmail.comdefbeed2023-03-19 09:19:05 +02001/*
2 * Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
3 *
4 * Copyright (c) 2017-2023 Nuvoton Technology Corp.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9#ifndef PLAT_NPCM845X_H
10#define PLAT_NPCM845X_H
11
12#include <drivers/arm/gicv2.h>
13#include <lib/psci/psci.h>
14
15unsigned int plat_calc_core_pos(uint64_t mpidr);
16void npcm845x_mailbox_init(uintptr_t base_addr);
17void plat_gic_driver_init(void);
18void plat_gic_init(void);
19void plat_gic_cpuif_enable(void);
20void plat_gic_cpuif_disable(void);
21void plat_gic_pcpu_init(void);
22
23void __dead2 npcm845x_system_off(void);
24void __dead2 npcm845x_system_reset(void);
25void npcm845x_pwr_domain_on_finish(const psci_power_state_t *target_state);
26bool npcm845x_is_wakeup_src_irqsteer(void);
27void __dead2 npcm845x_pwr_down_wfi(const psci_power_state_t *target_state);
28void npcm845x_cpu_standby(plat_local_state_t cpu_state);
29int npcm845x_validate_ns_entrypoint(uintptr_t entrypoint);
30int npcm845x_pwr_domain_on(u_register_t mpidr);
31int npcm845x_validate_power_state(unsigned int power_state,
32 psci_power_state_t *req_state);
33
34#if !ARM_BL31_IN_DRAM
35void npcm845x_get_sys_suspend_power_state(psci_power_state_t *req_state);
36#endif
37
38void __dead2 npcm845x_pwr_domain_pwr_down_wfi(
39 const psci_power_state_t *target_state);
40void npcm845x_pwr_domain_suspend_finish(const psci_power_state_t *target_state);
41void npcm845x_pwr_domain_suspend(const psci_power_state_t *target_state);
42void npcm845x_pwr_domain_off(const psci_power_state_t *target_state);
43void __init npcm845x_bl31_plat_arch_setup(void);
44
45#endif /* PLAT_NPCM845X_H */