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Usama Arifbec5afd2020-04-17 16:13:39 +01001TC0 Total Compute Platform
2==========================
3
4Some of the features of TC0 platform referenced in TF-A include:
5
6- A `System Control Processor <https://github.com/ARM-software/SCP-firmware>`_
7 to abstract power and system management tasks away from application
8 processors. The RAM firmware for SCP is included in the TF-A FIP and is
9 loaded by AP BL2 from FIP in flash to SRAM for copying by SCP (SCP has access
10 to AP SRAM).
11- GICv4
12- Trusted Board Boot
13- SCMI
14- MHUv2
15
16Boot Sequence
17-------------
18
19The execution begins from SCP_BL1. SCP_BL1 powers up the AP which starts
20executing AP_BL1 and then executes AP_BL2 which loads the SCP_BL2 from
21FIP to SRAM. The SCP has access to AP SRAM. The address and size of SCP_BL2
22is communicated to SCP using SDS. SCP copies SCP_BL2 from SRAM to its own
23RAM and starts executing it. The AP then continues executing the rest of TF-A
24stages including BL31 runtime stage and hands off executing to
25Non-secure world (u-boot).
26
27Build Procedure (TF-A only)
28~~~~~~~~~~~~~~~~~~~~~~~~~~~
29
30- Obtain arm `toolchain <https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads>`_.
31 Set the CROSS_COMPILE environment variable to point to the toolchain folder.
32
33- Build TF-A:
34
35 .. code:: shell
36
37 make PLAT=tc0 BL33=<path_to_uboot.bin> \
38 SCP_BL2=<path_to_scp_ramfw.bin> all fip
39
40 Enable TBBR by adding the following options to the make command:
41
42 .. code:: shell
43
44 MBEDTLS_DIR=<path_to_mbedtls_directory> \
45 TRUSTED_BOARD_BOOT=1 \
46 GENERATE_COT=1 \
47 ARM_ROTPK_LOCATION=devel_rsa \
48 ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
49
50*Copyright (c) 2020, Arm Limited. All rights reserved.*