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Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001/*
Roberto Vargas777dd432018-02-12 12:36:17 +00002 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00005 */
6
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +01007#ifndef XLAT_TABLES_PRIVATE_H
8#define XLAT_TABLES_PRIVATE_H
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00009
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000010#include <platform_def.h>
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +010011#include <stdbool.h>
Sandrine Bailleux090c8492017-05-19 09:59:37 +010012#include <xlat_tables_defs.h>
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000013
Antonio Nino Diazac998032017-02-27 17:23:54 +000014#if PLAT_XLAT_TABLES_DYNAMIC
15/*
Antonio Nino Diaz8643a812018-06-21 14:39:16 +010016 * Private shifts and masks to access fields of an mmap attribute
Antonio Nino Diazac998032017-02-27 17:23:54 +000017 */
18/* Dynamic or static */
Antonio Nino Diaz8643a812018-06-21 14:39:16 +010019#define MT_DYN_SHIFT U(31)
Antonio Nino Diazac998032017-02-27 17:23:54 +000020
21/*
22 * Memory mapping private attributes
23 *
Antonio Nino Diaz8643a812018-06-21 14:39:16 +010024 * Private attributes not exposed in the public header.
25 */
26
27/*
28 * Regions mapped before the MMU can't be unmapped dynamically (they are
29 * static) and regions mapped with MMU enabled can be unmapped. This
30 * behaviour can't be overridden.
31 *
32 * Static regions can overlap each other, dynamic regions can't.
Antonio Nino Diazac998032017-02-27 17:23:54 +000033 */
Antonio Nino Diaz8643a812018-06-21 14:39:16 +010034#define MT_STATIC (U(0) << MT_DYN_SHIFT)
35#define MT_DYNAMIC (U(1) << MT_DYN_SHIFT)
Antonio Nino Diazac998032017-02-27 17:23:54 +000036
Sandrine Bailleux33835542017-04-25 14:09:47 +010037#endif /* PLAT_XLAT_TABLES_DYNAMIC */
38
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010039extern uint64_t mmu_cfg_params[MMU_CFG_PARAM_MAX];
40
Antonio Nino Diazac998032017-02-27 17:23:54 +000041/*
Antonio Nino Diaz44d3c212018-07-05 08:11:48 +010042 * Return the execute-never mask that will prevent instruction fetch at the
43 * given translation regime.
44 */
45uint64_t xlat_arch_regime_get_xn_desc(int xlat_regime);
46
47/*
Douglas Raillard2d545792017-09-25 15:23:22 +010048 * Invalidate all TLB entries that match the given virtual address. This
49 * operation applies to all PEs in the same Inner Shareable domain as the PE
50 * that executes this function. This functions must be called for every
Antonio Nino Diazad5dc7f2018-07-11 09:46:45 +010051 * translation table entry that is modified. It only affects the specified
52 * translation regime.
Douglas Raillard2d545792017-09-25 15:23:22 +010053 *
54 * Note, however, that it is architecturally UNDEFINED to invalidate TLB entries
55 * pertaining to a higher exception level, e.g. invalidating EL3 entries from
56 * S-EL1.
Antonio Nino Diazac998032017-02-27 17:23:54 +000057 */
Antonio Nino Diazad5dc7f2018-07-11 09:46:45 +010058void xlat_arch_tlbi_va(uintptr_t va, int xlat_regime);
Antonio Nino Diazac998032017-02-27 17:23:54 +000059
60/*
61 * This function has to be called at the end of any code that uses the function
62 * xlat_arch_tlbi_va().
63 */
64void xlat_arch_tlbi_va_sync(void);
65
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000066/* Print VA, PA, size and attributes of all regions in the mmap array. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010067void xlat_mmap_print(const mmap_region_t *mmap);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000068
69/*
70 * Print the current state of the translation tables by reading them from
71 * memory.
72 */
73void xlat_tables_print(xlat_ctx_t *ctx);
74
75/*
Antonio Nino Diazf1b84f62018-07-03 11:58:49 +010076 * Returns a block/page table descriptor for the given level and attributes.
77 */
78uint64_t xlat_desc(const xlat_ctx_t *ctx, uint32_t attr,
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010079 unsigned long long addr_pa, unsigned int level);
Antonio Nino Diazf1b84f62018-07-03 11:58:49 +010080
81/*
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000082 * Architecture-specific initialization code.
83 */
Antonio Nino Diazefabaa92017-04-27 13:30:22 +010084
85/* Returns the current Exception Level. The returned EL must be 1 or higher. */
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +010086unsigned int xlat_arch_current_el(void);
Antonio Nino Diazefabaa92017-04-27 13:30:22 +010087
88/*
Sandrine Bailleuxc5b63772017-05-31 13:31:48 +010089 * Return the maximum physical address supported by the hardware.
90 * This value depends on the execution state (AArch32/AArch64).
91 */
92unsigned long long xlat_arch_get_max_supported_pa(void);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000093
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +010094/*
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +010095 * Returns true if the MMU of the translation regime managed by the given
96 * xlat_ctx_t is enabled, false otherwise.
Antonio Nino Diazdcf9d922017-10-04 16:52:15 +010097 */
Antonio Nino Diaz5c97bd12018-08-02 09:57:29 +010098bool is_mmu_enabled_ctx(const xlat_ctx_t *ctx);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000099
Antonio Nino Diaz37a5efa2018-08-07 12:47:12 +0100100/* Returns true if the data cache is enabled at the current EL. */
101bool is_dcache_enabled(void);
102
Antonio Nino Diaz50eb3742018-07-24 10:20:53 +0100103#endif /* XLAT_TABLES_PRIVATE_H */