| Haojian Zhuang | 602362d | 2017-06-01 12:15:14 +0800 | [diff] [blame] | 1 | # |
| 2 | # Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. |
| 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
| Victor Chong | 9128768 | 2017-05-28 00:14:37 +0900 | [diff] [blame] | 7 | # On Hikey960, the TSP can execute from TZC secure area in DRAM. |
| 8 | HIKEY960_TSP_RAM_LOCATION := dram |
| 9 | ifeq (${HIKEY960_TSP_RAM_LOCATION}, dram) |
| 10 | HIKEY960_TSP_RAM_LOCATION_ID = HIKEY960_DRAM_ID |
| 11 | else ifeq (${HIKEY960_TSP_RAM_LOCATION}, sram) |
| 12 | HIKEY960_TSP_RAM_LOCATION_ID := HIKEY960_SRAM_ID |
| 13 | else |
| 14 | $(error "Currently unsupported HIKEY960_TSP_RAM_LOCATION value") |
| 15 | endif |
| 16 | |
| Haojian Zhuang | 602362d | 2017-06-01 12:15:14 +0800 | [diff] [blame] | 17 | CRASH_CONSOLE_BASE := PL011_UART6_BASE |
| 18 | COLD_BOOT_SINGLE_CPU := 1 |
| 19 | PROGRAMMABLE_RESET_ADDRESS := 1 |
| 20 | |
| 21 | # Process flags |
| Victor Chong | 9128768 | 2017-05-28 00:14:37 +0900 | [diff] [blame] | 22 | $(eval $(call add_define,HIKEY960_TSP_RAM_LOCATION_ID)) |
| Haojian Zhuang | 602362d | 2017-06-01 12:15:14 +0800 | [diff] [blame] | 23 | $(eval $(call add_define,CRASH_CONSOLE_BASE)) |
| 24 | |
| 25 | ENABLE_PLAT_COMPAT := 0 |
| 26 | |
| 27 | USE_COHERENT_MEM := 1 |
| 28 | |
| 29 | PLAT_INCLUDES := -Iinclude/common/tbbr \ |
| 30 | -Iplat/hisilicon/hikey960/include |
| 31 | |
| 32 | PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/pl011_console.S \ |
| 33 | drivers/delay_timer/delay_timer.c \ |
| 34 | drivers/delay_timer/generic_delay_timer.c \ |
| 35 | lib/aarch64/xlat_tables.c \ |
| 36 | plat/hisilicon/hikey960/aarch64/hikey960_common.c \ |
| 37 | plat/hisilicon/hikey960/hikey960_boardid.c |
| 38 | |
| 39 | HIKEY960_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ |
| 40 | drivers/arm/gic/v2/gicv2_main.c \ |
| 41 | drivers/arm/gic/v2/gicv2_helpers.c \ |
| 42 | plat/common/plat_gicv2.c |
| 43 | |
| 44 | BL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \ |
| 45 | drivers/io/io_block.c \ |
| 46 | drivers/io/io_fip.c \ |
| 47 | drivers/io/io_storage.c \ |
| 48 | drivers/synopsys/ufs/dw_ufs.c \ |
| 49 | drivers/ufs/ufs.c \ |
| 50 | lib/cpus/aarch64/cortex_a53.S \ |
| 51 | plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \ |
| 52 | plat/hisilicon/hikey960/hikey960_bl1_setup.c \ |
| 53 | plat/hisilicon/hikey960/hikey960_io_storage.c \ |
| 54 | ${HIKEY960_GIC_SOURCES} |
| Haojian Zhuang | 1f73c0c | 2017-06-01 14:03:22 +0800 | [diff] [blame] | 55 | |
| 56 | BL2_SOURCES += drivers/io/io_block.c \ |
| 57 | drivers/io/io_fip.c \ |
| 58 | drivers/io/io_storage.c \ |
| 59 | drivers/ufs/ufs.c \ |
| 60 | plat/hisilicon/hikey960/hikey960_bl2_setup.c \ |
| 61 | plat/hisilicon/hikey960/hikey960_io_storage.c \ |
| 62 | plat/hisilicon/hikey960/hikey960_mcu_load.c |
| Haojian Zhuang | 1b5c225 | 2017-06-01 15:20:46 +0800 | [diff] [blame] | 63 | |
| 64 | BL31_SOURCES += drivers/arm/cci/cci.c \ |
| 65 | lib/cpus/aarch64/cortex_a53.S \ |
| 66 | lib/cpus/aarch64/cortex_a72.S \ |
| 67 | lib/cpus/aarch64/cortex_a73.S \ |
| 68 | plat/common/aarch64/plat_psci_common.c \ |
| 69 | plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \ |
| 70 | plat/hisilicon/hikey960/hikey960_bl31_setup.c \ |
| 71 | plat/hisilicon/hikey960/hikey960_pm.c \ |
| 72 | plat/hisilicon/hikey960/hikey960_topology.c \ |
| 73 | plat/hisilicon/hikey960/drivers/pwrc/hisi_pwrc.c \ |
| 74 | plat/hisilicon/hikey960/drivers/ipc/hisi_ipc.c \ |
| 75 | ${HIKEY960_GIC_SOURCES} |
| Victor Chong | cb27a35 | 2017-07-12 01:07:29 +0900 | [diff] [blame] | 76 | |
| 77 | # Enable workarounds for selected Cortex-A53 errata. |
| 78 | ERRATA_A53_836870 := 1 |
| 79 | ERRATA_A53_843419 := 1 |
| 80 | ERRATA_A53_855873 := 1 |