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Dan Handley9df48042015-03-19 18:58:55 +00001/*
Yatharth Kocharf11b29a2016-02-01 11:04:46 +00002 * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30#ifndef __COMMON_DEF_H__
31#define __COMMON_DEF_H__
32
Yatharth Kochara65be2f2015-10-09 18:06:13 +010033#include <bl_common.h>
34#include <platform_def.h>
35
Dan Handley9df48042015-03-19 18:58:55 +000036/******************************************************************************
37 * Required platform porting definitions that are expected to be common to
38 * all platforms
39 *****************************************************************************/
40
41/*
42 * Platform binary types for linking
43 */
Yatharth Kocharf528faf2016-06-28 16:58:26 +010044#ifdef AARCH32
45#define PLATFORM_LINKER_FORMAT "elf32-littlearm"
46#define PLATFORM_LINKER_ARCH arm
47#else
Dan Handley9df48042015-03-19 18:58:55 +000048#define PLATFORM_LINKER_FORMAT "elf64-littleaarch64"
49#define PLATFORM_LINKER_ARCH aarch64
Yatharth Kocharf528faf2016-06-28 16:58:26 +010050#endif /* AARCH32 */
Dan Handley9df48042015-03-19 18:58:55 +000051
52/*
53 * Generic platform constants
54 */
55#define FIRMWARE_WELCOME_STR "Booting Trusted Firmware\n"
56
Dan Handley9df48042015-03-19 18:58:55 +000057/*
58 * Some of the platform porting definitions use the 'ull' suffix in order to
59 * avoid subtle integer overflow errors due to implicit integer type promotion
60 * when working with 32-bit values.
61 *
Juan Castillo7d199412015-12-14 09:35:25 +000062 * The TSP linker script includes some of these definitions to define the BL32
Dan Handley9df48042015-03-19 18:58:55 +000063 * memory map, but the GNU LD does not support the 'ull' suffix, causing the
64 * build process to fail. To solve this problem, the auxiliary macro MAKE_ULL(x)
65 * will add the 'ull' suffix only when the macro __LINKER__ is not defined
66 * (__LINKER__ is defined in the command line to preprocess the linker script).
67 * Constants in the linker script will not have the 'ull' suffix, but this is
68 * not a problem since the linker evaluates all constant expressions to 64 bit
69 * (assuming the target architecture is 64 bit).
70 */
71#ifndef __LINKER__
72 #define MAKE_ULL(x) x##ull
73#else
74 #define MAKE_ULL(x) x
75#endif
76
Yatharth Kochar51f76f62016-09-12 16:10:33 +010077#if LOAD_IMAGE_V2
Yatharth Kochara65be2f2015-10-09 18:06:13 +010078#define BL2_IMAGE_DESC { \
79 .image_id = BL2_IMAGE_ID, \
Yatharth Kocharf11b29a2016-02-01 11:04:46 +000080 SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, \
Yatharth Kochar51f76f62016-09-12 16:10:33 +010081 VERSION_2, image_info_t, 0), \
82 .image_info.image_base = BL2_BASE, \
83 .image_info.image_max_size = BL2_LIMIT - BL2_BASE,\
84 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, \
85 VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),\
86 .ep_info.pc = BL2_BASE, \
87}
88#else /* LOAD_IMAGE_V2 */
89#define BL2_IMAGE_DESC { \
90 .image_id = BL2_IMAGE_ID, \
91 SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, \
Yatharth Kocharf11b29a2016-02-01 11:04:46 +000092 VERSION_1, image_info_t, 0), \
Yatharth Kochara65be2f2015-10-09 18:06:13 +010093 .image_info.image_base = BL2_BASE, \
Yatharth Kocharf11b29a2016-02-01 11:04:46 +000094 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, \
95 VERSION_1, entry_point_info_t, SECURE | EXECUTABLE),\
96 .ep_info.pc = BL2_BASE, \
Yatharth Kochara65be2f2015-10-09 18:06:13 +010097}
Yatharth Kochar51f76f62016-09-12 16:10:33 +010098#endif /* LOAD_IMAGE_V2 */
Yatharth Kochara65be2f2015-10-09 18:06:13 +010099
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +0100100/*
101 * The following constants identify the extents of the code & read-only data
102 * regions. These addresses are used by the MMU setup code and therefore they
103 * must be page-aligned.
104 *
105 * When the code and read-only data are mapped as a single atomic section
106 * (i.e. when SEPARATE_CODE_AND_RODATA=0) then we treat the whole section as
107 * code by specifying the read-only data section as empty.
108 *
109 * BL1 is different than the other images in the sense that its read-write data
110 * originally lives in Trusted ROM and needs to be relocated in Trusted SRAM at
111 * run-time. Therefore, the read-write data in ROM can be mapped with the same
112 * memory attributes as the read-only data region. For this reason, BL1 uses
113 * different macros.
114 *
115 * Note that BL1_ROM_END is not necessarily aligned on a page boundary as it
116 * just points to the end of BL1's actual content in Trusted ROM. Therefore it
117 * needs to be rounded up to the next page size in order to map the whole last
118 * page of it with the right memory attributes.
119 */
120#if SEPARATE_CODE_AND_RODATA
121#define BL_CODE_BASE (unsigned long)(&__TEXT_START__)
Masahiro Yamada51bef612017-01-18 02:10:08 +0900122#define BL_CODE_END (unsigned long)(&__TEXT_END__)
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +0100123#define BL_RO_DATA_BASE (unsigned long)(&__RODATA_START__)
Masahiro Yamada51bef612017-01-18 02:10:08 +0900124#define BL_RO_DATA_END (unsigned long)(&__RODATA_END__)
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +0100125
Masahiro Yamada51bef612017-01-18 02:10:08 +0900126#define BL1_CODE_END BL_CODE_END
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +0100127#define BL1_RO_DATA_BASE (unsigned long)(&__RODATA_START__)
Masahiro Yamada51bef612017-01-18 02:10:08 +0900128#define BL1_RO_DATA_END round_up(BL1_ROM_END, PAGE_SIZE)
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +0100129#else
130#define BL_CODE_BASE (unsigned long)(&__RO_START__)
Masahiro Yamada51bef612017-01-18 02:10:08 +0900131#define BL_CODE_END (unsigned long)(&__RO_END__)
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +0100132#define BL_RO_DATA_BASE 0
Masahiro Yamada51bef612017-01-18 02:10:08 +0900133#define BL_RO_DATA_END 0
Dan Handley9df48042015-03-19 18:58:55 +0000134
Masahiro Yamada51bef612017-01-18 02:10:08 +0900135#define BL1_CODE_END round_up(BL1_ROM_END, PAGE_SIZE)
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +0100136#define BL1_RO_DATA_BASE 0
Masahiro Yamada51bef612017-01-18 02:10:08 +0900137#define BL1_RO_DATA_END 0
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +0100138#endif /* SEPARATE_CODE_AND_RODATA */
139
Masahiro Yamada0fac5af2016-12-28 16:11:41 +0900140/*
141 * The next 2 constants identify the extents of the coherent memory region.
142 * These addresses are used by the MMU setup code and therefore they must be
143 * page-aligned. It is the responsibility of the linker script to ensure that
144 * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
145 * page-aligned addresses.
146 */
147#define BL_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
148#define BL_COHERENT_RAM_END (unsigned long)(&__COHERENT_RAM_END__)
149
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +0100150#endif /* __COMMON_DEF_H__ */