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Yann Gautiercd736192020-02-25 15:14:52 +01001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
4 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 */
6#include <dt-bindings/pinctrl/stm32-pinfunc.h>
7
8&pinctrl {
9 i2c4_pins_a: i2c4-0 {
10 pins {
11 pinmux = <STM32_PINMUX('E', 15, AF6)>, /* I2C4_SCL */
12 <STM32_PINMUX('B', 9, AF6)>; /* I2C4_SDA */
13 bias-disable;
14 drive-open-drain;
15 slew-rate = <0>;
16 };
17 };
18
19 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
Yann Gautier9f4037e2022-05-02 13:49:58 +020020 pins {
Yann Gautiercd736192020-02-25 15:14:52 +010021 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
22 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
23 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
24 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
25 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
26 slew-rate = <1>;
27 drive-push-pull;
28 bias-disable;
29 };
Yann Gautier9f4037e2022-05-02 13:49:58 +020030 };
31
32 sdmmc1_clk_pins_a: sdmmc1-clk-0 {
33 pins {
Yann Gautiercd736192020-02-25 15:14:52 +010034 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
Yann Gautier9f4037e2022-05-02 13:49:58 +020035 slew-rate = <1>;
Yann Gautiercd736192020-02-25 15:14:52 +010036 drive-push-pull;
37 bias-disable;
38 };
39 };
40
41 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
Yann Gautier9f4037e2022-05-02 13:49:58 +020042 pins {
Yann Gautiercd736192020-02-25 15:14:52 +010043 pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
44 <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
45 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
46 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2_D3 */
47 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
48 slew-rate = <1>;
49 drive-push-pull;
50 bias-pull-up;
51 };
Yann Gautier9f4037e2022-05-02 13:49:58 +020052 };
53
54 sdmmc2_clk_pins_a: sdmmc2-clk-0 {
55 pins {
Yann Gautiercd736192020-02-25 15:14:52 +010056 pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC2_CK */
Yann Gautier9f4037e2022-05-02 13:49:58 +020057 slew-rate = <1>;
Yann Gautiercd736192020-02-25 15:14:52 +010058 drive-push-pull;
59 bias-pull-up;
60 };
61 };
62
63 uart4_pins_a: uart4-0 {
64 pins1 {
65 pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */
66 bias-disable;
67 drive-push-pull;
68 slew-rate = <0>;
69 };
70 pins2 {
71 pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
72 bias-disable;
73 };
74 };
75
76 usart1_pins_a: usart1-0 {
77 pins1 {
78 pinmux = <STM32_PINMUX('C', 0, AF7)>, /* USART1_TX */
79 <STM32_PINMUX('C', 2, AF7)>; /* USART1_RTS */
80 bias-disable;
81 drive-push-pull;
82 slew-rate = <0>;
83 };
84 pins2 {
85 pinmux = <STM32_PINMUX('B', 0, AF4)>, /* USART1_RX */
86 <STM32_PINMUX('A', 7, AF7)>; /* USART1_CTS_NSS */
87 bias-pull-up;
88 };
89 };
90
91 uart8_pins_a: uart8-0 {
92 pins1 {
93 pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
94 bias-disable;
95 drive-push-pull;
96 slew-rate = <0>;
97 };
98 pins2 {
99 pinmux = <STM32_PINMUX('F', 9, AF8)>; /* UART8_RX */
100 bias-pull-up;
101 };
102 };
103};