Varun Wadekar | b374103 | 2017-09-25 13:27:45 -0700 | [diff] [blame] | 1 | /* |
steven kao | 05ee582 | 2018-01-02 19:07:00 -0800 | [diff] [blame] | 2 | * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. |
Varun Wadekar | b374103 | 2017-09-25 13:27:45 -0700 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef __BPMP_IPC_H__ |
| 8 | #define __BPMP_IPC_H__ |
| 9 | |
Ambroise Vincent | ffbf32a | 2019-03-28 09:01:18 +0000 | [diff] [blame] | 10 | #include <lib/utils_def.h> |
Varun Wadekar | b374103 | 2017-09-25 13:27:45 -0700 | [diff] [blame] | 11 | #include <stdbool.h> |
| 12 | #include <stdint.h> |
Varun Wadekar | b374103 | 2017-09-25 13:27:45 -0700 | [diff] [blame] | 13 | |
| 14 | /** |
| 15 | * Currently supported reset identifiers |
| 16 | */ |
| 17 | #define TEGRA_RESET_ID_XUSB_PADCTL U(114) |
| 18 | #define TEGRA_RESET_ID_GPCDMA U(70) |
| 19 | |
| 20 | /** |
steven kao | 05ee582 | 2018-01-02 19:07:00 -0800 | [diff] [blame] | 21 | * Clock identifier for the SE device |
| 22 | */ |
| 23 | #define TEGRA_CLK_SE U(124) |
| 24 | |
| 25 | /** |
Varun Wadekar | b374103 | 2017-09-25 13:27:45 -0700 | [diff] [blame] | 26 | * Function to initialise the IPC with the bpmp |
| 27 | */ |
| 28 | int32_t tegra_bpmp_ipc_init(void); |
| 29 | |
| 30 | /** |
| 31 | * Handler to reset a module |
| 32 | */ |
| 33 | int32_t tegra_bpmp_ipc_reset_module(uint32_t rst_id); |
| 34 | |
steven kao | 05ee582 | 2018-01-02 19:07:00 -0800 | [diff] [blame] | 35 | /** |
| 36 | * Handler to enable clock to a module. Only SE device is |
| 37 | * supported for now. |
| 38 | */ |
| 39 | int tegra_bpmp_ipc_enable_clock(uint32_t clk_id); |
| 40 | |
| 41 | /** |
| 42 | * Handler to disable clock to a module. Only SE device is |
| 43 | * supported for now. |
| 44 | */ |
| 45 | int tegra_bpmp_ipc_disable_clock(uint32_t clk_id); |
| 46 | |
Varun Wadekar | b374103 | 2017-09-25 13:27:45 -0700 | [diff] [blame] | 47 | #endif /* __BPMP_IPC_H__ */ |