blob: 2c724631d26768a3e0c1de95ae071b06e54ab924 [file] [log] [blame]
Muhammad Hadi Asyrafi Abdul Halimc0d4d932019-03-19 17:59:06 +08001/*
2 * Copyright (c) 2019, Intel Corporation. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Hadi Asyrafic461add2019-06-12 11:24:12 +08007#ifndef CAD_WATCHDOG_H
8#define CAD_WATCHDOG_H
Muhammad Hadi Asyrafi Abdul Halimc0d4d932019-03-19 17:59:06 +08009
10#define WDT_BASE (0xFFD00200)
11#define WDT_REG_SIZE_OFFSET (0x4)
12#define WDT_MIN_CYCLES (65536)
13#define WDT_PERIOD (20)
14
15#define WDT_CR (WDT_BASE + 0x0)
16#define WDT_TORR (WDT_BASE + 0x4)
17
18#define WDT_CRR (WDT_BASE + 0xC)
19
20#define WDT_CCVR (WDT_BASE + 0x8)
21#define WDT_STAT (WDT_BASE + 0x10)
22#define WDT_EOI (WDT_BASE + 0x14)
23
24#define WDT_COMP_PARAM_1 (WDT_BASE + 0xF4)
25#define WDT_COMP_VERSION (WDT_BASE + 0xF8)
26#define WDT_COMP_TYPE (WDT_BASE + 0XFC)
27
28#define WDT_CR_RMOD (0x0)
29#define WDT_CR_EN (0x1)
30
31#define WDT_SW_RST (0x76)
32
33
34void watchdog_init(int watchdog_clk);
Muhammad Hadi Asyrafi Abdul Halimc0d4d932019-03-19 17:59:06 +080035void watchdog_info(void);
36void watchdog_status(void);
37void watchdog_sw_rst(void);
38
39#endif