Aditya Angadi | d61740b | 2020-11-19 18:05:33 +0530 | [diff] [blame] | 1 | /* |
Aditya Angadi | ccae8a1 | 2021-08-09 09:38:58 +0530 | [diff] [blame] | 2 | * Copyright (c) 2020-2021, ARM Limited and Contributors. All rights reserved. |
Aditya Angadi | d61740b | 2020-11-19 18:05:33 +0530 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
Aditya Angadi | ccae8a1 | 2021-08-09 09:38:58 +0530 | [diff] [blame] | 7 | #include <common/debug.h> |
Aditya Angadi | d61740b | 2020-11-19 18:05:33 +0530 | [diff] [blame] | 8 | #include <plat/arm/common/plat_arm.h> |
| 9 | #include <platform_def.h> |
| 10 | |
Aditya Angadi | d61740b | 2020-11-19 18:05:33 +0530 | [diff] [blame] | 11 | static const arm_tzc_regions_info_t tzc_regions[] = { |
| 12 | ARM_TZC_REGIONS_DEF, |
| 13 | {} |
| 14 | }; |
Aditya Angadi | ccae8a1 | 2021-08-09 09:38:58 +0530 | [diff] [blame] | 15 | |
| 16 | #if (CSS_SGI_PLATFORM_VARIANT == 2 && CSS_SGI_CHIP_COUNT > 1) |
| 17 | static const arm_tzc_regions_info_t tzc_regions_mc[][CSS_SGI_CHIP_COUNT - 1] = { |
| 18 | { |
| 19 | /* TZC memory regions for second chip */ |
| 20 | SGI_PLAT_TZC_NS_REMOTE_REGIONS_DEF(1), |
| 21 | {} |
| 22 | }, |
| 23 | #if CSS_SGI_CHIP_COUNT > 2 |
| 24 | { |
| 25 | /* TZC memory regions for third chip */ |
| 26 | SGI_PLAT_TZC_NS_REMOTE_REGIONS_DEF(2), |
| 27 | {} |
| 28 | }, |
| 29 | #endif |
| 30 | #if CSS_SGI_CHIP_COUNT > 3 |
| 31 | { |
| 32 | /* TZC memory regions for fourth chip */ |
| 33 | SGI_PLAT_TZC_NS_REMOTE_REGIONS_DEF(3), |
| 34 | {} |
| 35 | }, |
| 36 | #endif |
| 37 | }; |
| 38 | #endif /* CSS_SGI_PLATFORM_VARIANT && CSS_SGI_CHIP_COUNT */ |
Aditya Angadi | d61740b | 2020-11-19 18:05:33 +0530 | [diff] [blame] | 39 | |
| 40 | /* Initialize the secure environment */ |
| 41 | void plat_arm_security_setup(void) |
| 42 | { |
Aditya Angadi | ccae8a1 | 2021-08-09 09:38:58 +0530 | [diff] [blame] | 43 | unsigned int i; |
Aditya Angadi | d61740b | 2020-11-19 18:05:33 +0530 | [diff] [blame] | 44 | |
Aditya Angadi | ccae8a1 | 2021-08-09 09:38:58 +0530 | [diff] [blame] | 45 | INFO("Configuring TrustZone Controller for Chip 0\n"); |
Aditya Angadi | d61740b | 2020-11-19 18:05:33 +0530 | [diff] [blame] | 46 | |
Aditya Angadi | ccae8a1 | 2021-08-09 09:38:58 +0530 | [diff] [blame] | 47 | for (i = 0; i < TZC400_COUNT; i++) { |
Aditya Angadi | d61740b | 2020-11-19 18:05:33 +0530 | [diff] [blame] | 48 | arm_tzc400_setup(TZC400_BASE(i), tzc_regions); |
Aditya Angadi | ccae8a1 | 2021-08-09 09:38:58 +0530 | [diff] [blame] | 49 | } |
| 50 | |
| 51 | #if (CSS_SGI_PLATFORM_VARIANT == 2 && CSS_SGI_CHIP_COUNT > 1) |
| 52 | unsigned int j; |
| 53 | |
| 54 | for (i = 1; i < CSS_SGI_CHIP_COUNT; i++) { |
| 55 | INFO("Configuring TrustZone Controller for Chip %u\n", i); |
Aditya Angadi | d61740b | 2020-11-19 18:05:33 +0530 | [diff] [blame] | 56 | |
Aditya Angadi | ccae8a1 | 2021-08-09 09:38:58 +0530 | [diff] [blame] | 57 | for (j = 0; j < TZC400_COUNT; j++) { |
| 58 | arm_tzc400_setup(CSS_SGI_REMOTE_CHIP_MEM_OFFSET(i) |
| 59 | + TZC400_BASE(j), tzc_regions_mc[i-1]); |
| 60 | } |
| 61 | } |
| 62 | #endif |
Aditya Angadi | d61740b | 2020-11-19 18:05:33 +0530 | [diff] [blame] | 63 | } |