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git01.mediatek.com / filogic / atf / 537bce44d3aecf78b272f54459f15b43d689ff06 / . / plat / nvidia / tegra / soc / t194 / drivers / include / smmu_plat_config.h
blob: f955e5366d8cd1f49c12dc15ef6cfd34f0a65e07 [file] [log] [blame]
Pritesh Raithatha537bce42017-01-02 19:43:45 +0530[diff] [blame^]1/*
2 * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef __SMMU_PLAT_CONFIG_H
8#define __SMMU_PLAT_CONFIG_H
9
10#include <mmio.h>
11#include <tegra_def.h>
12#include <smmu.h>
13
14static __attribute__((aligned(16))) smmu_regs_t smmu_ctx_regs[] = {
15 _START_OF_TABLE_,
16 mc_make_sid_security_cfg(PTCR),
17 mc_make_sid_security_cfg(HDAR),
18 mc_make_sid_security_cfg(HOST1XDMAR),
19 mc_make_sid_security_cfg(NVENCSRD),
20 mc_make_sid_security_cfg(SATAR),
21 mc_make_sid_security_cfg(MPCORER),
22 mc_make_sid_security_cfg(NVENCSWR),
23 mc_make_sid_security_cfg(HDAW),
24 mc_make_sid_security_cfg(MPCOREW),
25 mc_make_sid_security_cfg(SATAW),
26 mc_make_sid_security_cfg(ISPRA),
27 mc_make_sid_security_cfg(ISPFALR),
28 mc_make_sid_security_cfg(ISPWA),
29 mc_make_sid_security_cfg(ISPWB),
30 mc_make_sid_security_cfg(XUSB_HOSTR),
31 mc_make_sid_security_cfg(XUSB_HOSTW),
32 mc_make_sid_security_cfg(XUSB_DEVR),
33 mc_make_sid_security_cfg(XUSB_DEVW),
34 mc_make_sid_security_cfg(TSECSRD),
35 mc_make_sid_security_cfg(TSECSWR),
36 mc_make_sid_security_cfg(GPUSRD),
37 mc_make_sid_security_cfg(GPUSWR),
38 mc_make_sid_security_cfg(SDMMCRA),
39 mc_make_sid_security_cfg(SDMMCR),
40 mc_make_sid_security_cfg(SDMMCRAB),
41 mc_make_sid_security_cfg(SDMMCWA),
42 mc_make_sid_security_cfg(SDMMCW),
43 mc_make_sid_security_cfg(SDMMCWAB),
44 mc_make_sid_security_cfg(VICSRD),
45 mc_make_sid_security_cfg(VICSWR),
46 mc_make_sid_security_cfg(VIW),
47 mc_make_sid_security_cfg(NVDECSRD),
48 mc_make_sid_security_cfg(NVDECSWR),
49 mc_make_sid_security_cfg(APER),
50 mc_make_sid_security_cfg(APEW),
51 mc_make_sid_security_cfg(NVJPGSRD),
52 mc_make_sid_security_cfg(NVJPGSWR),
53 mc_make_sid_security_cfg(SESRD),
54 mc_make_sid_security_cfg(SESWR),
55 mc_make_sid_security_cfg(AXIAPR),
56 mc_make_sid_security_cfg(AXIAPW),
57 mc_make_sid_security_cfg(ETRR),
58 mc_make_sid_security_cfg(ETRW),
59 mc_make_sid_security_cfg(TSECSRDB),
60 mc_make_sid_security_cfg(TSECSWRB),
61 mc_make_sid_security_cfg(GPUSRD2),
62 mc_make_sid_security_cfg(GPUSWR2),
63 mc_make_sid_security_cfg(AXISR),
64 mc_make_sid_security_cfg(AXISW),
65 mc_make_sid_security_cfg(EQOSR),
66 mc_make_sid_security_cfg(EQOSW),
67 mc_make_sid_security_cfg(UFSHCR),
68 mc_make_sid_security_cfg(UFSHCW),
69 mc_make_sid_security_cfg(NVDISPLAYR),
70 mc_make_sid_security_cfg(BPMPR),
71 mc_make_sid_security_cfg(BPMPW),
72 mc_make_sid_security_cfg(BPMPDMAR),
73 mc_make_sid_security_cfg(BPMPDMAW),
74 mc_make_sid_security_cfg(AONR),
75 mc_make_sid_security_cfg(AONW),
76 mc_make_sid_security_cfg(AONDMAR),
77 mc_make_sid_security_cfg(AONDMAW),
78 mc_make_sid_security_cfg(SCER),
79 mc_make_sid_security_cfg(SCEW),
80 mc_make_sid_security_cfg(SCEDMAR),
81 mc_make_sid_security_cfg(SCEDMAW),
82 mc_make_sid_security_cfg(APEDMAR),
83 mc_make_sid_security_cfg(APEDMAW),
84 mc_make_sid_security_cfg(NVDISPLAYR1),
85 mc_make_sid_security_cfg(VICSRD1),
86 mc_make_sid_security_cfg(NVDECSRD1),
87 mc_make_sid_security_cfg(VIFALR),
88 mc_make_sid_security_cfg(VIFALW),
89 mc_make_sid_security_cfg(DLA0RDA),
90 mc_make_sid_security_cfg(DLA0FALRDB),
91 mc_make_sid_security_cfg(DLA0WRA),
92 mc_make_sid_security_cfg(DLA0FALWRB),
93 mc_make_sid_security_cfg(DLA1RDA),
94 mc_make_sid_security_cfg(DLA1FALRDB),
95 mc_make_sid_security_cfg(DLA1WRA),
96 mc_make_sid_security_cfg(DLA1FALWRB),
97 mc_make_sid_security_cfg(PVA0RDA),
98 mc_make_sid_security_cfg(PVA0RDB),
99 mc_make_sid_security_cfg(PVA0RDC),
100 mc_make_sid_security_cfg(PVA0WRA),
101 mc_make_sid_security_cfg(PVA0WRB),
102 mc_make_sid_security_cfg(PVA0WRC),
103 mc_make_sid_security_cfg(PVA1RDA),
104 mc_make_sid_security_cfg(PVA1RDB),
105 mc_make_sid_security_cfg(PVA1RDC),
106 mc_make_sid_security_cfg(PVA1WRA),
107 mc_make_sid_security_cfg(PVA1WRB),
108 mc_make_sid_security_cfg(PVA1WRC),
109 mc_make_sid_security_cfg(RCER),
110 mc_make_sid_security_cfg(RCEW),
111 mc_make_sid_security_cfg(RCEDMAR),
112 mc_make_sid_security_cfg(RCEDMAW),
113 mc_make_sid_security_cfg(NVENC1SRD),
114 mc_make_sid_security_cfg(NVENC1SWR),
115 mc_make_sid_security_cfg(PCIE0R),
116 mc_make_sid_security_cfg(PCIE0W),
117 mc_make_sid_security_cfg(PCIE1R),
118 mc_make_sid_security_cfg(PCIE1W),
119 mc_make_sid_security_cfg(PCIE2AR),
120 mc_make_sid_security_cfg(PCIE2AW),
121 mc_make_sid_security_cfg(PCIE3R),
122 mc_make_sid_security_cfg(PCIE3W),
123 mc_make_sid_security_cfg(PCIE4R),
124 mc_make_sid_security_cfg(PCIE4W),
125 mc_make_sid_security_cfg(PCIE5R),
126 mc_make_sid_security_cfg(PCIE5W),
127 mc_make_sid_security_cfg(ISPFALW),
128 mc_make_sid_security_cfg(DLA0RDA1),
129 mc_make_sid_security_cfg(DLA1RDA1),
130 mc_make_sid_security_cfg(PVA0RDA1),
131 mc_make_sid_security_cfg(PVA0RDB1),
132 mc_make_sid_security_cfg(PVA1RDA1),
133 mc_make_sid_security_cfg(PVA1RDB1),
134 mc_make_sid_security_cfg(PCIE5R1),
135 mc_make_sid_security_cfg(NVENCSRD1),
136 mc_make_sid_security_cfg(NVENC1SRD1),
137 mc_make_sid_security_cfg(ISPRA1),
138 mc_make_sid_security_cfg(MIU0R),
139 mc_make_sid_security_cfg(MIU0W),
140 mc_make_sid_security_cfg(MIU1R),
141 mc_make_sid_security_cfg(MIU1W),
142 mc_make_sid_security_cfg(MIU2R),
143 mc_make_sid_security_cfg(MIU2W),
144 mc_make_sid_security_cfg(MIU3R),
145 mc_make_sid_security_cfg(MIU3W),
146 mc_make_sid_override_cfg(PTCR),
147 mc_make_sid_override_cfg(HDAR),
148 mc_make_sid_override_cfg(HOST1XDMAR),
149 mc_make_sid_override_cfg(NVENCSRD),
150 mc_make_sid_override_cfg(SATAR),
151 mc_make_sid_override_cfg(MPCORER),
152 mc_make_sid_override_cfg(NVENCSWR),
153 mc_make_sid_override_cfg(HDAW),
154 mc_make_sid_override_cfg(MPCOREW),
155 mc_make_sid_override_cfg(SATAW),
156 mc_make_sid_override_cfg(ISPRA),
157 mc_make_sid_override_cfg(ISPFALR),
158 mc_make_sid_override_cfg(ISPWA),
159 mc_make_sid_override_cfg(ISPWB),
160 mc_make_sid_override_cfg(XUSB_HOSTR),
161 mc_make_sid_override_cfg(XUSB_HOSTW),
162 mc_make_sid_override_cfg(XUSB_DEVR),
163 mc_make_sid_override_cfg(XUSB_DEVW),
164 mc_make_sid_override_cfg(TSECSRD),
165 mc_make_sid_override_cfg(TSECSWR),
166 mc_make_sid_override_cfg(GPUSRD),
167 mc_make_sid_override_cfg(GPUSWR),
168 mc_make_sid_override_cfg(SDMMCRA),
169 mc_make_sid_override_cfg(SDMMCR),
170 mc_make_sid_override_cfg(SDMMCRAB),
171 mc_make_sid_override_cfg(SDMMCWA),
172 mc_make_sid_override_cfg(SDMMCW),
173 mc_make_sid_override_cfg(SDMMCWAB),
174 mc_make_sid_override_cfg(VICSRD),
175 mc_make_sid_override_cfg(VICSWR),
176 mc_make_sid_override_cfg(VIW),
177 mc_make_sid_override_cfg(NVDECSRD),
178 mc_make_sid_override_cfg(NVDECSWR),
179 mc_make_sid_override_cfg(APER),
180 mc_make_sid_override_cfg(APEW),
181 mc_make_sid_override_cfg(NVJPGSRD),
182 mc_make_sid_override_cfg(NVJPGSWR),
183 mc_make_sid_override_cfg(SESRD),
184 mc_make_sid_override_cfg(SESWR),
185 mc_make_sid_override_cfg(AXIAPR),
186 mc_make_sid_override_cfg(AXIAPW),
187 mc_make_sid_override_cfg(ETRR),
188 mc_make_sid_override_cfg(ETRW),
189 mc_make_sid_override_cfg(TSECSRDB),
190 mc_make_sid_override_cfg(TSECSWRB),
191 mc_make_sid_override_cfg(GPUSRD2),
192 mc_make_sid_override_cfg(GPUSWR2),
193 mc_make_sid_override_cfg(AXISR),
194 mc_make_sid_override_cfg(AXISW),
195 mc_make_sid_override_cfg(EQOSR),
196 mc_make_sid_override_cfg(EQOSW),
197 mc_make_sid_override_cfg(UFSHCR),
198 mc_make_sid_override_cfg(UFSHCW),
199 mc_make_sid_override_cfg(NVDISPLAYR),
200 mc_make_sid_override_cfg(BPMPR),
201 mc_make_sid_override_cfg(BPMPW),
202 mc_make_sid_override_cfg(BPMPDMAR),
203 mc_make_sid_override_cfg(BPMPDMAW),
204 mc_make_sid_override_cfg(AONR),
205 mc_make_sid_override_cfg(AONW),
206 mc_make_sid_override_cfg(AONDMAR),
207 mc_make_sid_override_cfg(AONDMAW),
208 mc_make_sid_override_cfg(SCER),
209 mc_make_sid_override_cfg(SCEW),
210 mc_make_sid_override_cfg(SCEDMAR),
211 mc_make_sid_override_cfg(SCEDMAW),
212 mc_make_sid_override_cfg(APEDMAR),
213 mc_make_sid_override_cfg(APEDMAW),
214 mc_make_sid_override_cfg(NVDISPLAYR1),
215 mc_make_sid_override_cfg(VICSRD1),
216 mc_make_sid_override_cfg(NVDECSRD1),
217 mc_make_sid_override_cfg(VIFALR),
218 mc_make_sid_override_cfg(VIFALW),
219 mc_make_sid_override_cfg(DLA0RDA),
220 mc_make_sid_override_cfg(DLA0FALRDB),
221 mc_make_sid_override_cfg(DLA0WRA),
222 mc_make_sid_override_cfg(DLA0FALWRB),
223 mc_make_sid_override_cfg(DLA1RDA),
224 mc_make_sid_override_cfg(DLA1FALRDB),
225 mc_make_sid_override_cfg(DLA1WRA),
226 mc_make_sid_override_cfg(DLA1FALWRB),
227 mc_make_sid_override_cfg(PVA0RDA),
228 mc_make_sid_override_cfg(PVA0RDB),
229 mc_make_sid_override_cfg(PVA0RDC),
230 mc_make_sid_override_cfg(PVA0WRA),
231 mc_make_sid_override_cfg(PVA0WRB),
232 mc_make_sid_override_cfg(PVA0WRC),
233 mc_make_sid_override_cfg(PVA1RDA),
234 mc_make_sid_override_cfg(PVA1RDB),
235 mc_make_sid_override_cfg(PVA1RDC),
236 mc_make_sid_override_cfg(PVA1WRA),
237 mc_make_sid_override_cfg(PVA1WRB),
238 mc_make_sid_override_cfg(PVA1WRC),
239 mc_make_sid_override_cfg(RCER),
240 mc_make_sid_override_cfg(RCEW),
241 mc_make_sid_override_cfg(RCEDMAR),
242 mc_make_sid_override_cfg(RCEDMAW),
243 mc_make_sid_override_cfg(NVENC1SRD),
244 mc_make_sid_override_cfg(NVENC1SWR),
245 mc_make_sid_override_cfg(PCIE0R),
246 mc_make_sid_override_cfg(PCIE0W),
247 mc_make_sid_override_cfg(PCIE1R),
248 mc_make_sid_override_cfg(PCIE1W),
249 mc_make_sid_override_cfg(PCIE2AR),
250 mc_make_sid_override_cfg(PCIE2AW),
251 mc_make_sid_override_cfg(PCIE3R),
252 mc_make_sid_override_cfg(PCIE3W),
253 mc_make_sid_override_cfg(PCIE4R),
254 mc_make_sid_override_cfg(PCIE4W),
255 mc_make_sid_override_cfg(PCIE5R),
256 mc_make_sid_override_cfg(PCIE5W),
257 mc_make_sid_override_cfg(ISPFALW),
258 mc_make_sid_override_cfg(DLA0RDA1),
259 mc_make_sid_override_cfg(DLA1RDA1),
260 mc_make_sid_override_cfg(PVA0RDA1),
261 mc_make_sid_override_cfg(PVA0RDB1),
262 mc_make_sid_override_cfg(PVA1RDA1),
263 mc_make_sid_override_cfg(PVA1RDB1),
264 mc_make_sid_override_cfg(PCIE5R1),
265 mc_make_sid_override_cfg(NVENCSRD1),
266 mc_make_sid_override_cfg(NVENC1SRD1),
267 mc_make_sid_override_cfg(ISPRA1),
268 mc_make_sid_override_cfg(MIU0R),
269 mc_make_sid_override_cfg(MIU0W),
270 mc_make_sid_override_cfg(MIU1R),
271 mc_make_sid_override_cfg(MIU1W),
272 mc_make_sid_override_cfg(MIU2R),
273 mc_make_sid_override_cfg(MIU2W),
274 mc_make_sid_override_cfg(MIU3R),
275 mc_make_sid_override_cfg(MIU3W),
276 smmu_make_gnsr0_nsec_cfg(CR0),
277 smmu_make_gnsr0_sec_cfg(IDR0),
278 smmu_make_gnsr0_sec_cfg(IDR1),
279 smmu_make_gnsr0_sec_cfg(IDR2),
280 smmu_make_gnsr0_nsec_cfg(GFSR),
281 smmu_make_gnsr0_nsec_cfg(GFSYNR0),
282 smmu_make_gnsr0_nsec_cfg(GFSYNR1),
283 smmu_make_gnsr0_nsec_cfg(TLBGSTATUS),
284 smmu_make_gnsr0_nsec_cfg(PIDR2),
285 smmu_make_smrg_group(0),
286 smmu_make_smrg_group(1),
287 smmu_make_smrg_group(2),
288 smmu_make_smrg_group(3),
289 smmu_make_smrg_group(4),
290 smmu_make_smrg_group(5),
291 smmu_make_smrg_group(6),
292 smmu_make_smrg_group(7),
293 smmu_make_smrg_group(8),
294 smmu_make_smrg_group(9),
295 smmu_make_smrg_group(10),
296 smmu_make_smrg_group(11),
297 smmu_make_smrg_group(12),
298 smmu_make_smrg_group(13),
299 smmu_make_smrg_group(14),
300 smmu_make_smrg_group(15),
301 smmu_make_smrg_group(16),
302 smmu_make_smrg_group(17),
303 smmu_make_smrg_group(18),
304 smmu_make_smrg_group(19),
305 smmu_make_smrg_group(20),
306 smmu_make_smrg_group(21),
307 smmu_make_smrg_group(22),
308 smmu_make_smrg_group(23),
309 smmu_make_smrg_group(24),
310 smmu_make_smrg_group(25),
311 smmu_make_smrg_group(26),
312 smmu_make_smrg_group(27),
313 smmu_make_smrg_group(28),
314 smmu_make_smrg_group(29),
315 smmu_make_smrg_group(30),
316 smmu_make_smrg_group(31),
317 smmu_make_smrg_group(32),
318 smmu_make_smrg_group(33),
319 smmu_make_smrg_group(34),
320 smmu_make_smrg_group(35),
321 smmu_make_smrg_group(36),
322 smmu_make_smrg_group(37),
323 smmu_make_smrg_group(38),
324 smmu_make_smrg_group(39),
325 smmu_make_smrg_group(40),
326 smmu_make_smrg_group(41),
327 smmu_make_smrg_group(42),
328 smmu_make_smrg_group(43),
329 smmu_make_smrg_group(44),
330 smmu_make_smrg_group(45),
331 smmu_make_smrg_group(46),
332 smmu_make_smrg_group(47),
333 smmu_make_smrg_group(48),
334 smmu_make_smrg_group(49),
335 smmu_make_smrg_group(50),
336 smmu_make_smrg_group(51),
337 smmu_make_smrg_group(52),
338 smmu_make_smrg_group(53),
339 smmu_make_smrg_group(54),
340 smmu_make_smrg_group(55),
341 smmu_make_smrg_group(56),
342 smmu_make_smrg_group(57),
343 smmu_make_smrg_group(58),
344 smmu_make_smrg_group(59),
345 smmu_make_smrg_group(60),
346 smmu_make_smrg_group(61),
347 smmu_make_smrg_group(62),
348 smmu_make_smrg_group(63),
349 smmu_make_cb_group(0),
350 smmu_make_cb_group(1),
351 smmu_make_cb_group(2),
352 smmu_make_cb_group(3),
353 smmu_make_cb_group(4),
354 smmu_make_cb_group(5),
355 smmu_make_cb_group(6),
356 smmu_make_cb_group(7),
357 smmu_make_cb_group(8),
358 smmu_make_cb_group(9),
359 smmu_make_cb_group(10),
360 smmu_make_cb_group(11),
361 smmu_make_cb_group(12),
362 smmu_make_cb_group(13),
363 smmu_make_cb_group(14),
364 smmu_make_cb_group(15),
365 smmu_make_cb_group(16),
366 smmu_make_cb_group(17),
367 smmu_make_cb_group(18),
368 smmu_make_cb_group(19),
369 smmu_make_cb_group(20),
370 smmu_make_cb_group(21),
371 smmu_make_cb_group(22),
372 smmu_make_cb_group(23),
373 smmu_make_cb_group(24),
374 smmu_make_cb_group(25),
375 smmu_make_cb_group(26),
376 smmu_make_cb_group(27),
377 smmu_make_cb_group(28),
378 smmu_make_cb_group(29),
379 smmu_make_cb_group(30),
380 smmu_make_cb_group(31),
381 smmu_make_cb_group(32),
382 smmu_make_cb_group(33),
383 smmu_make_cb_group(34),
384 smmu_make_cb_group(35),
385 smmu_make_cb_group(36),
386 smmu_make_cb_group(37),
387 smmu_make_cb_group(38),
388 smmu_make_cb_group(39),
389 smmu_make_cb_group(40),
390 smmu_make_cb_group(41),
391 smmu_make_cb_group(42),
392 smmu_make_cb_group(43),
393 smmu_make_cb_group(44),
394 smmu_make_cb_group(45),
395 smmu_make_cb_group(46),
396 smmu_make_cb_group(47),
397 smmu_make_cb_group(48),
398 smmu_make_cb_group(49),
399 smmu_make_cb_group(50),
400 smmu_make_cb_group(51),
401 smmu_make_cb_group(52),
402 smmu_make_cb_group(53),
403 smmu_make_cb_group(54),
404 smmu_make_cb_group(55),
405 smmu_make_cb_group(56),
406 smmu_make_cb_group(57),
407 smmu_make_cb_group(58),
408 smmu_make_cb_group(59),
409 smmu_make_cb_group(60),
410 smmu_make_cb_group(61),
411 smmu_make_cb_group(62),
412 smmu_make_cb_group(63),
413 smmu_bypass_cfg, /* TBU settings */
414 _END_OF_TABLE_,
415};
416
417#endif //__SMMU_PLAT_CONFIG_H