Pritesh Raithatha | 537bce4 | 2017-01-02 19:43:45 +0530 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef __MEMCTRL_PLAT_CONFIG_H |
| 8 | #define __MEMCTRL_PLAT_CONFIG_H |
| 9 | |
| 10 | #include <memctrl_v2.h> |
| 11 | |
| 12 | /******************************************************************************* |
| 13 | * StreamID to indicate no SMMU translations (requests to be steered on the |
| 14 | * SMMU bypass path) |
| 15 | ******************************************************************************/ |
| 16 | #define MC_STREAM_ID_MAX 0x7F |
| 17 | |
| 18 | /******************************************************************************* |
| 19 | * Stream ID Override Config registers |
| 20 | ******************************************************************************/ |
| 21 | #define MC_STREAMID_OVERRIDE_CFG_PTCR 0x000 |
| 22 | #define MC_STREAMID_OVERRIDE_CFG_HDAR 0x0A8 |
| 23 | #define MC_STREAMID_OVERRIDE_CFG_HOST1XDMAR 0x0B0 |
| 24 | #define MC_STREAMID_OVERRIDE_CFG_NVENCSRD 0x0E0 |
| 25 | #define MC_STREAMID_OVERRIDE_CFG_SATAR 0x0F8 |
| 26 | #define MC_STREAMID_OVERRIDE_CFG_MPCORER 0x138 |
| 27 | #define MC_STREAMID_OVERRIDE_CFG_NVENCSWR 0x158 |
| 28 | #define MC_STREAMID_OVERRIDE_CFG_HDAW 0x1A8 |
| 29 | #define MC_STREAMID_OVERRIDE_CFG_MPCOREW 0x1C8 |
| 30 | #define MC_STREAMID_OVERRIDE_CFG_SATAW 0x1E8 |
| 31 | #define MC_STREAMID_OVERRIDE_CFG_ISPRA 0x220 |
| 32 | #define MC_STREAMID_OVERRIDE_CFG_ISPFALR 0x228 |
| 33 | #define MC_STREAMID_OVERRIDE_CFG_ISPWA 0x230 |
| 34 | #define MC_STREAMID_OVERRIDE_CFG_ISPWB 0x238 |
| 35 | #define MC_STREAMID_OVERRIDE_CFG_XUSB_HOSTR 0x250 |
| 36 | #define MC_STREAMID_OVERRIDE_CFG_XUSB_HOSTW 0x258 |
| 37 | #define MC_STREAMID_OVERRIDE_CFG_XUSB_DEVR 0x260 |
| 38 | #define MC_STREAMID_OVERRIDE_CFG_XUSB_DEVW 0x268 |
| 39 | #define MC_STREAMID_OVERRIDE_CFG_TSECSRD 0x2A0 |
| 40 | #define MC_STREAMID_OVERRIDE_CFG_TSECSWR 0x2A8 |
| 41 | #define MC_STREAMID_OVERRIDE_CFG_GPUSRD 0x2C0 /*TODO: remove it after HW team confirmation */ |
| 42 | #define MC_STREAMID_OVERRIDE_CFG_GPUSWR 0x2C8 /*TODO: remove it after HW team confirmation */ |
| 43 | #define MC_STREAMID_OVERRIDE_CFG_SDMMCRA 0x300 |
| 44 | #define MC_STREAMID_OVERRIDE_CFG_SDMMCR 0x310 |
| 45 | #define MC_STREAMID_OVERRIDE_CFG_SDMMCRAB 0x318 |
| 46 | #define MC_STREAMID_OVERRIDE_CFG_SDMMCWA 0x320 |
| 47 | #define MC_STREAMID_OVERRIDE_CFG_SDMMCW 0x330 |
| 48 | #define MC_STREAMID_OVERRIDE_CFG_SDMMCWAB 0x338 |
| 49 | #define MC_STREAMID_OVERRIDE_CFG_VICSRD 0x360 |
| 50 | #define MC_STREAMID_OVERRIDE_CFG_VICSWR 0x368 |
| 51 | #define MC_STREAMID_OVERRIDE_CFG_VIW 0x390 |
| 52 | #define MC_STREAMID_OVERRIDE_CFG_NVDECSRD 0x3C0 |
| 53 | #define MC_STREAMID_OVERRIDE_CFG_NVDECSWR 0x3C8 |
| 54 | #define MC_STREAMID_OVERRIDE_CFG_APER 0x3D0 |
| 55 | #define MC_STREAMID_OVERRIDE_CFG_APEW 0x3D8 |
| 56 | #define MC_STREAMID_OVERRIDE_CFG_NVJPGSRD 0x3F0 |
| 57 | #define MC_STREAMID_OVERRIDE_CFG_NVJPGSWR 0x3F8 |
| 58 | #define MC_STREAMID_OVERRIDE_CFG_SESRD 0x400 |
| 59 | #define MC_STREAMID_OVERRIDE_CFG_SESWR 0x408 |
| 60 | #define MC_STREAMID_OVERRIDE_CFG_AXIAPR 0x410 |
| 61 | #define MC_STREAMID_OVERRIDE_CFG_AXIAPW 0x418 |
| 62 | #define MC_STREAMID_OVERRIDE_CFG_ETRR 0x420 |
| 63 | #define MC_STREAMID_OVERRIDE_CFG_ETRW 0x428 |
| 64 | #define MC_STREAMID_OVERRIDE_CFG_TSECSRDB 0x430 |
| 65 | #define MC_STREAMID_OVERRIDE_CFG_TSECSWRB 0x438 |
| 66 | #define MC_STREAMID_OVERRIDE_CFG_GPUSRD2 0x440 /*TODO: remove it after HW team confirmation */ |
| 67 | #define MC_STREAMID_OVERRIDE_CFG_GPUSWR2 0x448 /*TODO: remove it after HW team confirmation */ |
| 68 | #define MC_STREAMID_OVERRIDE_CFG_AXISR 0x460 |
| 69 | #define MC_STREAMID_OVERRIDE_CFG_AXISW 0x468 |
| 70 | #define MC_STREAMID_OVERRIDE_CFG_EQOSR 0x470 |
| 71 | #define MC_STREAMID_OVERRIDE_CFG_EQOSW 0x478 |
| 72 | #define MC_STREAMID_OVERRIDE_CFG_UFSHCR 0x480 |
| 73 | #define MC_STREAMID_OVERRIDE_CFG_UFSHCW 0x488 |
| 74 | #define MC_STREAMID_OVERRIDE_CFG_NVDISPLAYR 0x490 |
| 75 | #define MC_STREAMID_OVERRIDE_CFG_BPMPR 0x498 |
| 76 | #define MC_STREAMID_OVERRIDE_CFG_BPMPW 0x4A0 |
| 77 | #define MC_STREAMID_OVERRIDE_CFG_BPMPDMAR 0x4A8 |
| 78 | #define MC_STREAMID_OVERRIDE_CFG_BPMPDMAW 0x4B0 |
| 79 | #define MC_STREAMID_OVERRIDE_CFG_AONR 0x4B8 |
| 80 | #define MC_STREAMID_OVERRIDE_CFG_AONW 0x4C0 |
| 81 | #define MC_STREAMID_OVERRIDE_CFG_AONDMAR 0x4C8 |
| 82 | #define MC_STREAMID_OVERRIDE_CFG_AONDMAW 0x4D0 |
| 83 | #define MC_STREAMID_OVERRIDE_CFG_SCER 0x4D8 |
| 84 | #define MC_STREAMID_OVERRIDE_CFG_SCEW 0x4E0 |
| 85 | #define MC_STREAMID_OVERRIDE_CFG_SCEDMAR 0x4E8 |
| 86 | #define MC_STREAMID_OVERRIDE_CFG_SCEDMAW 0x4F0 |
| 87 | #define MC_STREAMID_OVERRIDE_CFG_APEDMAR 0x4F8 |
| 88 | #define MC_STREAMID_OVERRIDE_CFG_APEDMAW 0x500 |
| 89 | #define MC_STREAMID_OVERRIDE_CFG_NVDISPLAYR1 0x508 |
| 90 | #define MC_STREAMID_OVERRIDE_CFG_VICSRD1 0x510 |
| 91 | #define MC_STREAMID_OVERRIDE_CFG_NVDECSRD1 0x518 |
| 92 | #define MC_STREAMID_OVERRIDE_CFG_MIU0R 0x530 |
| 93 | #define MC_STREAMID_OVERRIDE_CFG_MIU0W 0x538 |
| 94 | #define MC_STREAMID_OVERRIDE_CFG_MIU1R 0x540 |
| 95 | #define MC_STREAMID_OVERRIDE_CFG_MIU1W 0x548 |
| 96 | #define MC_STREAMID_OVERRIDE_CFG_MIU2R 0x570 |
| 97 | #define MC_STREAMID_OVERRIDE_CFG_MIU2W 0x578 |
| 98 | #define MC_STREAMID_OVERRIDE_CFG_MIU3R 0x580 |
| 99 | #define MC_STREAMID_OVERRIDE_CFG_MIU3W 0x588 |
| 100 | #define MC_STREAMID_OVERRIDE_CFG_VIFALR 0x5E0 |
| 101 | #define MC_STREAMID_OVERRIDE_CFG_VIFALW 0x5E8 |
| 102 | #define MC_STREAMID_OVERRIDE_CFG_DLA0RDA 0x5F0 |
| 103 | #define MC_STREAMID_OVERRIDE_CFG_DLA0FALRDB 0x5F8 |
| 104 | #define MC_STREAMID_OVERRIDE_CFG_DLA0WRA 0x600 |
| 105 | #define MC_STREAMID_OVERRIDE_CFG_DLA0FALWRB 0x608 |
| 106 | #define MC_STREAMID_OVERRIDE_CFG_DLA1RDA 0x610 |
| 107 | #define MC_STREAMID_OVERRIDE_CFG_DLA1FALRDB 0x618 |
| 108 | #define MC_STREAMID_OVERRIDE_CFG_DLA1WRA 0x620 |
| 109 | #define MC_STREAMID_OVERRIDE_CFG_DLA1FALWRB 0x628 |
| 110 | #define MC_STREAMID_OVERRIDE_CFG_PVA0RDA 0x630 |
| 111 | #define MC_STREAMID_OVERRIDE_CFG_PVA0RDB 0x638 |
| 112 | #define MC_STREAMID_OVERRIDE_CFG_PVA0RDC 0x640 |
| 113 | #define MC_STREAMID_OVERRIDE_CFG_PVA0WRA 0x648 |
| 114 | #define MC_STREAMID_OVERRIDE_CFG_PVA0WRB 0x650 |
| 115 | #define MC_STREAMID_OVERRIDE_CFG_PVA0WRC 0x658 |
| 116 | #define MC_STREAMID_OVERRIDE_CFG_PVA1RDA 0x660 |
| 117 | #define MC_STREAMID_OVERRIDE_CFG_PVA1RDB 0x668 |
| 118 | #define MC_STREAMID_OVERRIDE_CFG_PVA1RDC 0x670 |
| 119 | #define MC_STREAMID_OVERRIDE_CFG_PVA1WRA 0x678 |
| 120 | #define MC_STREAMID_OVERRIDE_CFG_PVA1WRB 0x680 |
| 121 | #define MC_STREAMID_OVERRIDE_CFG_PVA1WRC 0x688 |
| 122 | #define MC_STREAMID_OVERRIDE_CFG_RCER 0x690 |
| 123 | #define MC_STREAMID_OVERRIDE_CFG_RCEW 0x698 |
| 124 | #define MC_STREAMID_OVERRIDE_CFG_RCEDMAR 0x6A0 |
| 125 | #define MC_STREAMID_OVERRIDE_CFG_RCEDMAW 0x6A8 |
| 126 | #define MC_STREAMID_OVERRIDE_CFG_NVENC1SRD 0x6B0 |
| 127 | #define MC_STREAMID_OVERRIDE_CFG_NVENC1SWR 0x6B8 |
| 128 | #define MC_STREAMID_OVERRIDE_CFG_PCIE0R 0x6C0 |
| 129 | #define MC_STREAMID_OVERRIDE_CFG_PCIE0W 0x6C8 |
| 130 | #define MC_STREAMID_OVERRIDE_CFG_PCIE1R 0x6D0 |
| 131 | #define MC_STREAMID_OVERRIDE_CFG_PCIE1W 0x6D8 |
| 132 | #define MC_STREAMID_OVERRIDE_CFG_PCIE2AR 0x6E0 |
| 133 | #define MC_STREAMID_OVERRIDE_CFG_PCIE2AW 0x6E8 |
| 134 | #define MC_STREAMID_OVERRIDE_CFG_PCIE3R 0x6F0 |
| 135 | #define MC_STREAMID_OVERRIDE_CFG_PCIE3W 0x6F8 |
| 136 | #define MC_STREAMID_OVERRIDE_CFG_PCIE4R 0x700 |
| 137 | #define MC_STREAMID_OVERRIDE_CFG_PCIE4W 0x708 |
| 138 | #define MC_STREAMID_OVERRIDE_CFG_PCIE5R 0x710 |
| 139 | #define MC_STREAMID_OVERRIDE_CFG_PCIE5W 0x718 |
| 140 | #define MC_STREAMID_OVERRIDE_CFG_ISPFALW 0x720 |
| 141 | #define MC_STREAMID_OVERRIDE_CFG_DLA0RDA1 0x748 |
| 142 | #define MC_STREAMID_OVERRIDE_CFG_DLA1RDA1 0x750 |
| 143 | #define MC_STREAMID_OVERRIDE_CFG_PVA0RDA1 0x758 |
| 144 | #define MC_STREAMID_OVERRIDE_CFG_PVA0RDB1 0x760 |
| 145 | #define MC_STREAMID_OVERRIDE_CFG_PVA1RDA1 0x768 |
| 146 | #define MC_STREAMID_OVERRIDE_CFG_PVA1RDB1 0x770 |
| 147 | #define MC_STREAMID_OVERRIDE_CFG_PCIE5R1 0x778 |
| 148 | #define MC_STREAMID_OVERRIDE_CFG_NVENCSRD1 0x780 |
| 149 | #define MC_STREAMID_OVERRIDE_CFG_NVENC1SRD1 0x788 |
| 150 | #define MC_STREAMID_OVERRIDE_CFG_ISPRA1 0x790 |
| 151 | #define MC_STREAMID_OVERRIDE_CFG_PCIE0R1 0x798 |
| 152 | #define MC_STREAMID_OVERRIDE_CFG_NVDEC1SRD 0x7C8 |
| 153 | #define MC_STREAMID_OVERRIDE_CFG_NVDEC1SRD1 0x7D0 |
| 154 | #define MC_STREAMID_OVERRIDE_CFG_NVDEC1SWR 0x7D8 |
| 155 | |
| 156 | /******************************************************************************* |
| 157 | * Macro to calculate Security cfg register addr from StreamID Override register |
| 158 | ******************************************************************************/ |
| 159 | #define MC_STREAMID_OVERRIDE_TO_SECURITY_CFG(addr) (addr + sizeof(uint32_t)) |
| 160 | |
| 161 | /******************************************************************************* |
| 162 | * Memory Controller transaction override config registers |
| 163 | ******************************************************************************/ |
| 164 | #define MC_TXN_OVERRIDE_CONFIG_HDAR 0x10a8 |
| 165 | #define MC_TXN_OVERRIDE_CONFIG_BPMPW 0x14a0 |
| 166 | #define MC_TXN_OVERRIDE_CONFIG_PTCR 0x1000 |
| 167 | #define MC_TXN_OVERRIDE_CONFIG_NVDISPLAYR 0x1490 |
| 168 | #define MC_TXN_OVERRIDE_CONFIG_EQOSW 0x1478 |
| 169 | #define MC_TXN_OVERRIDE_CONFIG_NVJPGSWR 0x13f8 |
| 170 | #define MC_TXN_OVERRIDE_CONFIG_ISPRA 0x1220 |
| 171 | #define MC_TXN_OVERRIDE_CONFIG_VICSRD 0x1360 |
| 172 | #define MC_TXN_OVERRIDE_CONFIG_MPCOREW 0x11c8 |
| 173 | #define MC_TXN_OVERRIDE_CONFIG_GPUSRD 0x12c0 |
| 174 | #define MC_TXN_OVERRIDE_CONFIG_AXISR 0x1460 |
| 175 | #define MC_TXN_OVERRIDE_CONFIG_SCEDMAW 0x14f0 |
| 176 | #define MC_TXN_OVERRIDE_CONFIG_SDMMCW 0x1330 |
| 177 | #define MC_TXN_OVERRIDE_CONFIG_EQOSR 0x1470 |
| 178 | #define MC_TXN_OVERRIDE_CONFIG_APEDMAR 0x14f8 |
| 179 | #define MC_TXN_OVERRIDE_CONFIG_NVENCSRD 0x10e0 |
| 180 | #define MC_TXN_OVERRIDE_CONFIG_SDMMCRAB 0x1318 |
| 181 | #define MC_TXN_OVERRIDE_CONFIG_VICSRD1 0x1510 |
| 182 | #define MC_TXN_OVERRIDE_CONFIG_BPMPDMAR 0x14a8 |
| 183 | #define MC_TXN_OVERRIDE_CONFIG_VIW 0x1390 |
| 184 | #define MC_TXN_OVERRIDE_CONFIG_AXISW 0x1468 |
| 185 | #define MC_TXN_OVERRIDE_CONFIG_XUSB_DEVR 0x1260 |
| 186 | #define MC_TXN_OVERRIDE_CONFIG_UFSHCR 0x1480 |
| 187 | #define MC_TXN_OVERRIDE_CONFIG_TSECSWR 0x12a8 |
| 188 | #define MC_TXN_OVERRIDE_CONFIG_GPUSWR 0x12c8 |
| 189 | #define MC_TXN_OVERRIDE_CONFIG_SATAR 0x10f8 |
| 190 | #define MC_TXN_OVERRIDE_CONFIG_XUSB_HOSTW 0x1258 |
| 191 | #define MC_TXN_OVERRIDE_CONFIG_TSECSWRB 0x1438 |
| 192 | #define MC_TXN_OVERRIDE_CONFIG_GPUSRD2 0x1440 |
| 193 | #define MC_TXN_OVERRIDE_CONFIG_SCEDMAR 0x14e8 |
| 194 | #define MC_TXN_OVERRIDE_CONFIG_GPUSWR2 0x1448 |
| 195 | #define MC_TXN_OVERRIDE_CONFIG_AONDMAW 0x14d0 |
| 196 | #define MC_TXN_OVERRIDE_CONFIG_APEDMAW 0x1500 |
| 197 | #define MC_TXN_OVERRIDE_CONFIG_AONW 0x14c0 |
| 198 | #define MC_TXN_OVERRIDE_CONFIG_HOST1XDMAR 0x10b0 |
| 199 | #define MC_TXN_OVERRIDE_CONFIG_ETRR 0x1420 |
| 200 | #define MC_TXN_OVERRIDE_CONFIG_SESWR 0x1408 |
| 201 | #define MC_TXN_OVERRIDE_CONFIG_NVJPGSRD 0x13f0 |
| 202 | #define MC_TXN_OVERRIDE_CONFIG_NVDECSRD 0x13c0 |
| 203 | #define MC_TXN_OVERRIDE_CONFIG_TSECSRDB 0x1430 |
| 204 | #define MC_TXN_OVERRIDE_CONFIG_BPMPDMAW 0x14b0 |
| 205 | #define MC_TXN_OVERRIDE_CONFIG_APER 0x13d0 |
| 206 | #define MC_TXN_OVERRIDE_CONFIG_NVDECSRD1 0x1518 |
| 207 | #define MC_TXN_OVERRIDE_CONFIG_XUSB_HOSTR 0x1250 |
| 208 | #define MC_TXN_OVERRIDE_CONFIG_ISPWA 0x1230 |
| 209 | #define MC_TXN_OVERRIDE_CONFIG_SESRD 0x1400 |
| 210 | #define MC_TXN_OVERRIDE_CONFIG_SCER 0x14d8 |
| 211 | #define MC_TXN_OVERRIDE_CONFIG_AONR 0x14b8 |
| 212 | #define MC_TXN_OVERRIDE_CONFIG_MPCORER 0x1138 |
| 213 | #define MC_TXN_OVERRIDE_CONFIG_SDMMCWA 0x1320 |
| 214 | #define MC_TXN_OVERRIDE_CONFIG_HDAW 0x11a8 |
| 215 | #define MC_TXN_OVERRIDE_CONFIG_NVDECSWR 0x13c8 |
| 216 | #define MC_TXN_OVERRIDE_CONFIG_UFSHCW 0x1488 |
| 217 | #define MC_TXN_OVERRIDE_CONFIG_AONDMAR 0x14c8 |
| 218 | #define MC_TXN_OVERRIDE_CONFIG_SATAW 0x11e8 |
| 219 | #define MC_TXN_OVERRIDE_CONFIG_ETRW 0x1428 |
| 220 | #define MC_TXN_OVERRIDE_CONFIG_VICSWR 0x1368 |
| 221 | #define MC_TXN_OVERRIDE_CONFIG_NVENCSWR 0x1158 |
| 222 | #define MC_TXN_OVERRIDE_CONFIG_SDMMCWAB 0x1338 |
| 223 | #define MC_TXN_OVERRIDE_CONFIG_SDMMCRA 0x1300 |
| 224 | #define MC_TXN_OVERRIDE_CONFIG_NVDISPLAYR1 0x1508 |
| 225 | #define MC_TXN_OVERRIDE_CONFIG_ISPWB 0x1238 |
| 226 | #define MC_TXN_OVERRIDE_CONFIG_BPMPR 0x1498 |
| 227 | #define MC_TXN_OVERRIDE_CONFIG_APEW 0x13d8 |
| 228 | #define MC_TXN_OVERRIDE_CONFIG_SDMMCR 0x1310 |
| 229 | #define MC_TXN_OVERRIDE_CONFIG_XUSB_DEVW 0x1268 |
| 230 | #define MC_TXN_OVERRIDE_CONFIG_TSECSRD 0x12a0 |
| 231 | #define MC_TXN_OVERRIDE_CONFIG_SCEW 0x14e0 |
| 232 | #define MC_TXN_OVERRIDE_CONFIG_MIU0R 0x1530 |
| 233 | #define MC_TXN_OVERRIDE_CONFIG_MIU0W 0x1538 |
| 234 | #define MC_TXN_OVERRIDE_CONFIG_MIU1R 0x1540 |
| 235 | #define MC_TXN_OVERRIDE_CONFIG_MIU1W 0x1548 |
| 236 | #define MC_TXN_OVERRIDE_CONFIG_MIU2R 0x1570 |
| 237 | #define MC_TXN_OVERRIDE_CONFIG_MIU2W 0x1578 |
| 238 | #define MC_TXN_OVERRIDE_CONFIG_MIU3R 0x1580 |
| 239 | #define MC_TXN_OVERRIDE_CONFIG_MIU3W 0x158C |
| 240 | #define MC_TXN_OVERRIDE_CONFIG_VIFALR 0x15E4 |
| 241 | #define MC_TXN_OVERRIDE_CONFIG_VIFALW 0x15EC |
| 242 | #define MC_TXN_OVERRIDE_CONFIG_DLA0RDA 0x15F4 |
| 243 | #define MC_TXN_OVERRIDE_CONFIG_DLA0FALRDB 0x15FC |
| 244 | #define MC_TXN_OVERRIDE_CONFIG_DLA0WRA 0x1604 |
| 245 | #define MC_TXN_OVERRIDE_CONFIG_DLA0FALWRB 0x160C |
| 246 | #define MC_TXN_OVERRIDE_CONFIG_DLA1RDA 0x1614 |
| 247 | #define MC_TXN_OVERRIDE_CONFIG_DLA1FALRDB 0x161C |
| 248 | #define MC_TXN_OVERRIDE_CONFIG_DLA1WRA 0x1624 |
| 249 | #define MC_TXN_OVERRIDE_CONFIG_DLA1FALWRB 0x162C |
| 250 | #define MC_TXN_OVERRIDE_CONFIG_PVA0RDA 0x1634 |
| 251 | #define MC_TXN_OVERRIDE_CONFIG_PVA0RDB 0x163C |
| 252 | #define MC_TXN_OVERRIDE_CONFIG_PVA0RDC 0x1644 |
| 253 | #define MC_TXN_OVERRIDE_CONFIG_PVA0WRA 0x164C |
| 254 | #define MC_TXN_OVERRIDE_CONFIG_PVA0WRB 0x1654 |
| 255 | #define MC_TXN_OVERRIDE_CONFIG_PVA0WRC 0x165C |
| 256 | #define MC_TXN_OVERRIDE_CONFIG_PVA1RDA 0x1664 |
| 257 | #define MC_TXN_OVERRIDE_CONFIG_PVA1RDB 0x166C |
| 258 | #define MC_TXN_OVERRIDE_CONFIG_PVA1RDC 0x1674 |
| 259 | #define MC_TXN_OVERRIDE_CONFIG_PVA1WRA 0x167C |
| 260 | #define MC_TXN_OVERRIDE_CONFIG_PVA1WRB 0x1684 |
| 261 | #define MC_TXN_OVERRIDE_CONFIG_PVA1WRC 0x168C |
| 262 | #define MC_TXN_OVERRIDE_CONFIG_RCER 0x1694 |
| 263 | #define MC_TXN_OVERRIDE_CONFIG_RCEW 0x169C |
| 264 | #define MC_TXN_OVERRIDE_CONFIG_RCEDMAR 0x16A4 |
| 265 | #define MC_TXN_OVERRIDE_CONFIG_RCEDMAW 0x16AC |
| 266 | #define MC_TXN_OVERRIDE_CONFIG_NVENC1SRD 0x16B4 |
| 267 | #define MC_TXN_OVERRIDE_CONFIG_NVENC1SWR 0x16BC |
| 268 | #define MC_TXN_OVERRIDE_CONFIG_PCIE0R 0x16C4 |
| 269 | #define MC_TXN_OVERRIDE_CONFIG_PCIE0W 0x16CC |
| 270 | #define MC_TXN_OVERRIDE_CONFIG_PCIE1R 0x16D4 |
| 271 | #define MC_TXN_OVERRIDE_CONFIG_PCIE1W 0x16DC |
| 272 | #define MC_TXN_OVERRIDE_CONFIG_PCIE2AR 0x16E4 |
| 273 | #define MC_TXN_OVERRIDE_CONFIG_PCIE2AW 0x16EC |
| 274 | #define MC_TXN_OVERRIDE_CONFIG_PCIE3R 0x16F4 |
| 275 | #define MC_TXN_OVERRIDE_CONFIG_PCIE3W 0x16FC |
| 276 | #define MC_TXN_OVERRIDE_CONFIG_PCIE4R 0x1704 |
| 277 | #define MC_TXN_OVERRIDE_CONFIG_PCIE4W 0x170C |
| 278 | #define MC_TXN_OVERRIDE_CONFIG_PCIE5R 0x1714 |
| 279 | #define MC_TXN_OVERRIDE_CONFIG_PCIE5W 0x171C |
| 280 | #define MC_TXN_OVERRIDE_CONFIG_ISPFALW 0x1724 |
| 281 | #define MC_TXN_OVERRIDE_CONFIG_DLA0RDA1 0x174C |
| 282 | #define MC_TXN_OVERRIDE_CONFIG_DLA1RDA1 0x1754 |
| 283 | #define MC_TXN_OVERRIDE_CONFIG_PVA0RDA1 0x175C |
| 284 | #define MC_TXN_OVERRIDE_CONFIG_PVA0RDB1 0x1764 |
| 285 | #define MC_TXN_OVERRIDE_CONFIG_PVA1RDA1 0x176C |
| 286 | #define MC_TXN_OVERRIDE_CONFIG_PVA1RDB1 0x1774 |
| 287 | #define MC_TXN_OVERRIDE_CONFIG_PCIE5R1 0x177C |
| 288 | #define MC_TXN_OVERRIDE_CONFIG_NVENCSRD1 0x1784 |
| 289 | #define MC_TXN_OVERRIDE_CONFIG_NVENC1SRD1 0x178C |
| 290 | #define MC_TXN_OVERRIDE_CONFIG_ISPRA1 0x1794 |
| 291 | #define MC_TXN_OVERRIDE_CONFIG_PCIE0R1 0x179C |
| 292 | #define MC_TXN_OVERRIDE_CONFIG_NVDEC1SRD 0x17CC |
| 293 | #define MC_TXN_OVERRIDE_CONFIG_NVDEC1SRD1 0x17D4 |
| 294 | #define MC_TXN_OVERRIDE_CONFIG_NVDEC1SWR 0x17DC |
| 295 | |
| 296 | /******************************************************************************* |
| 297 | * Array to hold stream_id override config register offsets |
| 298 | ******************************************************************************/ |
| 299 | const static uint32_t mc_streamid_override_regs[] = { |
| 300 | MC_STREAMID_OVERRIDE_CFG_PTCR, |
| 301 | MC_STREAMID_OVERRIDE_CFG_HDAR, |
| 302 | MC_STREAMID_OVERRIDE_CFG_HOST1XDMAR, |
| 303 | MC_STREAMID_OVERRIDE_CFG_NVENCSRD, |
| 304 | MC_STREAMID_OVERRIDE_CFG_SATAR, |
| 305 | MC_STREAMID_OVERRIDE_CFG_MPCORER, |
| 306 | MC_STREAMID_OVERRIDE_CFG_NVENCSWR, |
| 307 | MC_STREAMID_OVERRIDE_CFG_HDAW, |
| 308 | MC_STREAMID_OVERRIDE_CFG_MPCOREW, |
| 309 | MC_STREAMID_OVERRIDE_CFG_SATAW, |
| 310 | MC_STREAMID_OVERRIDE_CFG_ISPRA, |
| 311 | MC_STREAMID_OVERRIDE_CFG_ISPFALR, |
| 312 | MC_STREAMID_OVERRIDE_CFG_ISPWA, |
| 313 | MC_STREAMID_OVERRIDE_CFG_ISPWB, |
| 314 | MC_STREAMID_OVERRIDE_CFG_XUSB_HOSTR, |
| 315 | MC_STREAMID_OVERRIDE_CFG_XUSB_HOSTW, |
| 316 | MC_STREAMID_OVERRIDE_CFG_XUSB_DEVR, |
| 317 | MC_STREAMID_OVERRIDE_CFG_XUSB_DEVW, |
| 318 | MC_STREAMID_OVERRIDE_CFG_TSECSRD, |
| 319 | MC_STREAMID_OVERRIDE_CFG_TSECSWR, |
| 320 | MC_STREAMID_OVERRIDE_CFG_GPUSRD, |
| 321 | MC_STREAMID_OVERRIDE_CFG_GPUSWR, |
| 322 | MC_STREAMID_OVERRIDE_CFG_SDMMCRA, |
| 323 | MC_STREAMID_OVERRIDE_CFG_SDMMCR, |
| 324 | MC_STREAMID_OVERRIDE_CFG_SDMMCRAB, |
| 325 | MC_STREAMID_OVERRIDE_CFG_SDMMCWA, |
| 326 | MC_STREAMID_OVERRIDE_CFG_SDMMCW, |
| 327 | MC_STREAMID_OVERRIDE_CFG_SDMMCWAB, |
| 328 | MC_STREAMID_OVERRIDE_CFG_VICSRD, |
| 329 | MC_STREAMID_OVERRIDE_CFG_VICSWR, |
| 330 | MC_STREAMID_OVERRIDE_CFG_VIW, |
| 331 | MC_STREAMID_OVERRIDE_CFG_NVDECSRD, |
| 332 | MC_STREAMID_OVERRIDE_CFG_NVDECSWR, |
| 333 | MC_STREAMID_OVERRIDE_CFG_APER, |
| 334 | MC_STREAMID_OVERRIDE_CFG_APEW, |
| 335 | MC_STREAMID_OVERRIDE_CFG_NVJPGSRD, |
| 336 | MC_STREAMID_OVERRIDE_CFG_NVJPGSWR, |
| 337 | MC_STREAMID_OVERRIDE_CFG_SESRD, |
| 338 | MC_STREAMID_OVERRIDE_CFG_SESWR, |
| 339 | MC_STREAMID_OVERRIDE_CFG_AXIAPR, |
| 340 | MC_STREAMID_OVERRIDE_CFG_AXIAPW, |
| 341 | MC_STREAMID_OVERRIDE_CFG_ETRR, |
| 342 | MC_STREAMID_OVERRIDE_CFG_ETRW, |
| 343 | MC_STREAMID_OVERRIDE_CFG_TSECSRDB, |
| 344 | MC_STREAMID_OVERRIDE_CFG_TSECSWRB, |
| 345 | MC_STREAMID_OVERRIDE_CFG_GPUSRD2, |
| 346 | MC_STREAMID_OVERRIDE_CFG_GPUSWR2, |
| 347 | MC_STREAMID_OVERRIDE_CFG_AXISR, |
| 348 | MC_STREAMID_OVERRIDE_CFG_AXISW, |
| 349 | MC_STREAMID_OVERRIDE_CFG_EQOSR, |
| 350 | MC_STREAMID_OVERRIDE_CFG_EQOSW, |
| 351 | MC_STREAMID_OVERRIDE_CFG_UFSHCR, |
| 352 | MC_STREAMID_OVERRIDE_CFG_UFSHCW, |
| 353 | MC_STREAMID_OVERRIDE_CFG_NVDISPLAYR, |
| 354 | MC_STREAMID_OVERRIDE_CFG_BPMPR, |
| 355 | MC_STREAMID_OVERRIDE_CFG_BPMPW, |
| 356 | MC_STREAMID_OVERRIDE_CFG_BPMPDMAR, |
| 357 | MC_STREAMID_OVERRIDE_CFG_BPMPDMAW, |
| 358 | MC_STREAMID_OVERRIDE_CFG_AONR, |
| 359 | MC_STREAMID_OVERRIDE_CFG_AONW, |
| 360 | MC_STREAMID_OVERRIDE_CFG_AONDMAR, |
| 361 | MC_STREAMID_OVERRIDE_CFG_AONDMAW, |
| 362 | MC_STREAMID_OVERRIDE_CFG_SCER, |
| 363 | MC_STREAMID_OVERRIDE_CFG_SCEW, |
| 364 | MC_STREAMID_OVERRIDE_CFG_SCEDMAR, |
| 365 | MC_STREAMID_OVERRIDE_CFG_SCEDMAW, |
| 366 | MC_STREAMID_OVERRIDE_CFG_APEDMAR, |
| 367 | MC_STREAMID_OVERRIDE_CFG_APEDMAW, |
| 368 | MC_STREAMID_OVERRIDE_CFG_NVDISPLAYR1, |
| 369 | MC_STREAMID_OVERRIDE_CFG_VICSRD1, |
| 370 | MC_STREAMID_OVERRIDE_CFG_NVDECSRD1, |
| 371 | MC_STREAMID_OVERRIDE_CFG_VIFALR, |
| 372 | MC_STREAMID_OVERRIDE_CFG_VIFALW, |
| 373 | MC_STREAMID_OVERRIDE_CFG_DLA0RDA, |
| 374 | MC_STREAMID_OVERRIDE_CFG_DLA0FALRDB, |
| 375 | MC_STREAMID_OVERRIDE_CFG_DLA0WRA, |
| 376 | MC_STREAMID_OVERRIDE_CFG_DLA0FALWRB, |
| 377 | MC_STREAMID_OVERRIDE_CFG_DLA1RDA, |
| 378 | MC_STREAMID_OVERRIDE_CFG_DLA1FALRDB, |
| 379 | MC_STREAMID_OVERRIDE_CFG_DLA1WRA, |
| 380 | MC_STREAMID_OVERRIDE_CFG_DLA1FALWRB, |
| 381 | MC_STREAMID_OVERRIDE_CFG_PVA0RDA, |
| 382 | MC_STREAMID_OVERRIDE_CFG_PVA0RDB, |
| 383 | MC_STREAMID_OVERRIDE_CFG_PVA0RDC, |
| 384 | MC_STREAMID_OVERRIDE_CFG_PVA0WRA, |
| 385 | MC_STREAMID_OVERRIDE_CFG_PVA0WRB, |
| 386 | MC_STREAMID_OVERRIDE_CFG_PVA0WRC, |
| 387 | MC_STREAMID_OVERRIDE_CFG_PVA1RDA, |
| 388 | MC_STREAMID_OVERRIDE_CFG_PVA1RDB, |
| 389 | MC_STREAMID_OVERRIDE_CFG_PVA1RDC, |
| 390 | MC_STREAMID_OVERRIDE_CFG_PVA1WRA, |
| 391 | MC_STREAMID_OVERRIDE_CFG_PVA1WRB, |
| 392 | MC_STREAMID_OVERRIDE_CFG_PVA1WRC, |
| 393 | MC_STREAMID_OVERRIDE_CFG_RCER, |
| 394 | MC_STREAMID_OVERRIDE_CFG_RCEW, |
| 395 | MC_STREAMID_OVERRIDE_CFG_RCEDMAR, |
| 396 | MC_STREAMID_OVERRIDE_CFG_RCEDMAW, |
| 397 | MC_STREAMID_OVERRIDE_CFG_NVENC1SRD, |
| 398 | MC_STREAMID_OVERRIDE_CFG_NVENC1SWR, |
| 399 | MC_STREAMID_OVERRIDE_CFG_PCIE0R, |
| 400 | MC_STREAMID_OVERRIDE_CFG_PCIE0W, |
| 401 | MC_STREAMID_OVERRIDE_CFG_PCIE1R, |
| 402 | MC_STREAMID_OVERRIDE_CFG_PCIE1W, |
| 403 | MC_STREAMID_OVERRIDE_CFG_PCIE2AR, |
| 404 | MC_STREAMID_OVERRIDE_CFG_PCIE2AW, |
| 405 | MC_STREAMID_OVERRIDE_CFG_PCIE3R, |
| 406 | MC_STREAMID_OVERRIDE_CFG_PCIE3W, |
| 407 | MC_STREAMID_OVERRIDE_CFG_PCIE4R, |
| 408 | MC_STREAMID_OVERRIDE_CFG_PCIE4W, |
| 409 | MC_STREAMID_OVERRIDE_CFG_PCIE5R, |
| 410 | MC_STREAMID_OVERRIDE_CFG_PCIE5W, |
| 411 | MC_STREAMID_OVERRIDE_CFG_ISPFALW, |
| 412 | MC_STREAMID_OVERRIDE_CFG_DLA0RDA1, |
| 413 | MC_STREAMID_OVERRIDE_CFG_DLA1RDA1, |
| 414 | MC_STREAMID_OVERRIDE_CFG_PVA0RDA1, |
| 415 | MC_STREAMID_OVERRIDE_CFG_PVA0RDB1, |
| 416 | MC_STREAMID_OVERRIDE_CFG_PVA1RDA1, |
| 417 | MC_STREAMID_OVERRIDE_CFG_PVA1RDB1, |
| 418 | MC_STREAMID_OVERRIDE_CFG_PCIE5R1, |
| 419 | MC_STREAMID_OVERRIDE_CFG_NVENCSRD1, |
| 420 | MC_STREAMID_OVERRIDE_CFG_NVENC1SRD1, |
| 421 | MC_STREAMID_OVERRIDE_CFG_ISPRA1, |
| 422 | MC_STREAMID_OVERRIDE_CFG_MIU0R, |
| 423 | MC_STREAMID_OVERRIDE_CFG_MIU0W, |
| 424 | MC_STREAMID_OVERRIDE_CFG_MIU1R, |
| 425 | MC_STREAMID_OVERRIDE_CFG_MIU1W, |
| 426 | MC_STREAMID_OVERRIDE_CFG_MIU2R, |
| 427 | MC_STREAMID_OVERRIDE_CFG_MIU2W, |
| 428 | MC_STREAMID_OVERRIDE_CFG_MIU3R, |
| 429 | MC_STREAMID_OVERRIDE_CFG_MIU3W |
| 430 | }; |
| 431 | |
| 432 | /******************************************************************************* |
| 433 | * Array to hold the security configs for stream IDs |
| 434 | ******************************************************************************/ |
| 435 | const static mc_streamid_security_cfg_t mc_streamid_sec_cfgs[] = { |
| 436 | mc_make_sec_cfg(PTCR, NON_SECURE, OVERRIDE, ENABLE), |
| 437 | mc_make_sec_cfg(HDAR, NON_SECURE, OVERRIDE, ENABLE), |
| 438 | mc_make_sec_cfg(HOST1XDMAR, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 439 | mc_make_sec_cfg(NVENCSRD, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 440 | mc_make_sec_cfg(SATAR, NON_SECURE, OVERRIDE, ENABLE), |
| 441 | mc_make_sec_cfg(MPCORER, NON_SECURE, OVERRIDE, ENABLE), |
| 442 | mc_make_sec_cfg(NVENCSWR, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 443 | mc_make_sec_cfg(HDAW, NON_SECURE, OVERRIDE, ENABLE), |
| 444 | mc_make_sec_cfg(MPCOREW, NON_SECURE, OVERRIDE, ENABLE), |
| 445 | mc_make_sec_cfg(SATAW, NON_SECURE, OVERRIDE, ENABLE), |
| 446 | mc_make_sec_cfg(ISPRA, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 447 | mc_make_sec_cfg(ISPFALR, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 448 | mc_make_sec_cfg(ISPWA, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 449 | mc_make_sec_cfg(ISPWB, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 450 | mc_make_sec_cfg(XUSB_HOSTR, NON_SECURE, OVERRIDE, ENABLE), |
| 451 | mc_make_sec_cfg(XUSB_HOSTW, NON_SECURE, OVERRIDE, ENABLE), |
| 452 | mc_make_sec_cfg(XUSB_DEVR, NON_SECURE, OVERRIDE, ENABLE), |
| 453 | mc_make_sec_cfg(XUSB_DEVW, NON_SECURE, OVERRIDE, ENABLE), |
| 454 | mc_make_sec_cfg(TSECSRD, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 455 | mc_make_sec_cfg(TSECSWR, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 456 | mc_make_sec_cfg(GPUSRD, SECURE, NO_OVERRIDE, DISABLE), |
| 457 | mc_make_sec_cfg(GPUSWR, SECURE, NO_OVERRIDE, DISABLE), |
| 458 | mc_make_sec_cfg(SDMMCRA, NON_SECURE, OVERRIDE, ENABLE), |
| 459 | mc_make_sec_cfg(SDMMCR, NON_SECURE, OVERRIDE, ENABLE), |
| 460 | mc_make_sec_cfg(SDMMCRAB, NON_SECURE, OVERRIDE, ENABLE), |
| 461 | mc_make_sec_cfg(SDMMCWA, NON_SECURE, OVERRIDE, ENABLE), |
| 462 | mc_make_sec_cfg(SDMMCW, NON_SECURE, OVERRIDE, ENABLE), |
| 463 | mc_make_sec_cfg(SDMMCWAB, NON_SECURE, OVERRIDE, ENABLE), |
| 464 | mc_make_sec_cfg(VICSRD, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 465 | mc_make_sec_cfg(VICSWR, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 466 | mc_make_sec_cfg(VIW, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 467 | mc_make_sec_cfg(NVDECSRD, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 468 | mc_make_sec_cfg(NVDECSWR, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 469 | mc_make_sec_cfg(APER, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 470 | mc_make_sec_cfg(APEW, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 471 | mc_make_sec_cfg(NVJPGSRD, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 472 | mc_make_sec_cfg(NVJPGSWR, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 473 | mc_make_sec_cfg(SESRD, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 474 | mc_make_sec_cfg(SESWR, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 475 | mc_make_sec_cfg(AXIAPR, NON_SECURE, OVERRIDE, ENABLE), |
| 476 | mc_make_sec_cfg(AXIAPW, NON_SECURE, OVERRIDE, ENABLE), |
| 477 | mc_make_sec_cfg(ETRR, NON_SECURE, OVERRIDE, ENABLE), |
| 478 | mc_make_sec_cfg(ETRW, NON_SECURE, OVERRIDE, ENABLE), |
| 479 | mc_make_sec_cfg(TSECSRDB, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 480 | mc_make_sec_cfg(TSECSWRB, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 481 | mc_make_sec_cfg(GPUSRD2, SECURE, NO_OVERRIDE, DISABLE), |
| 482 | mc_make_sec_cfg(GPUSWR2, SECURE, NO_OVERRIDE, DISABLE), |
| 483 | mc_make_sec_cfg(AXISR, SECURE, NO_OVERRIDE, DISABLE), |
| 484 | mc_make_sec_cfg(AXISW, SECURE, NO_OVERRIDE, DISABLE), |
| 485 | mc_make_sec_cfg(EQOSR, NON_SECURE, OVERRIDE, ENABLE), |
| 486 | mc_make_sec_cfg(EQOSW, NON_SECURE, OVERRIDE, ENABLE), |
| 487 | mc_make_sec_cfg(UFSHCR, NON_SECURE, OVERRIDE, ENABLE), |
| 488 | mc_make_sec_cfg(UFSHCW, NON_SECURE, OVERRIDE, ENABLE), |
| 489 | mc_make_sec_cfg(NVDISPLAYR, NON_SECURE, OVERRIDE, ENABLE), |
| 490 | mc_make_sec_cfg(BPMPR, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 491 | mc_make_sec_cfg(BPMPW, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 492 | mc_make_sec_cfg(BPMPDMAR, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 493 | mc_make_sec_cfg(BPMPDMAW, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 494 | mc_make_sec_cfg(AONR, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 495 | mc_make_sec_cfg(AONW, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 496 | mc_make_sec_cfg(AONDMAR, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 497 | mc_make_sec_cfg(AONDMAW, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 498 | mc_make_sec_cfg(SCER, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 499 | mc_make_sec_cfg(SCEW, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 500 | mc_make_sec_cfg(SCEDMAR, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 501 | mc_make_sec_cfg(SCEDMAW, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 502 | mc_make_sec_cfg(APEDMAR, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 503 | mc_make_sec_cfg(APEDMAW, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 504 | mc_make_sec_cfg(NVDISPLAYR1, NON_SECURE, OVERRIDE, ENABLE), |
| 505 | mc_make_sec_cfg(VICSRD1, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 506 | mc_make_sec_cfg(NVDECSRD1, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 507 | mc_make_sec_cfg(VIFALR, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 508 | mc_make_sec_cfg(VIFALW, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 509 | mc_make_sec_cfg(DLA0RDA, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 510 | mc_make_sec_cfg(DLA0FALRDB, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 511 | mc_make_sec_cfg(DLA0WRA, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 512 | mc_make_sec_cfg(DLA0FALWRB, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 513 | mc_make_sec_cfg(DLA1RDA, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 514 | mc_make_sec_cfg(DLA1FALRDB, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 515 | mc_make_sec_cfg(DLA1WRA, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 516 | mc_make_sec_cfg(DLA1FALWRB, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 517 | mc_make_sec_cfg(PVA0RDA, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 518 | mc_make_sec_cfg(PVA0RDB, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 519 | mc_make_sec_cfg(PVA0RDC, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 520 | mc_make_sec_cfg(PVA0WRA, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 521 | mc_make_sec_cfg(PVA0WRB, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 522 | mc_make_sec_cfg(PVA0WRC, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 523 | mc_make_sec_cfg(PVA1RDA, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 524 | mc_make_sec_cfg(PVA1RDB, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 525 | mc_make_sec_cfg(PVA1RDC, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 526 | mc_make_sec_cfg(PVA1WRA, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 527 | mc_make_sec_cfg(PVA1WRB, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 528 | mc_make_sec_cfg(PVA1WRC, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 529 | mc_make_sec_cfg(RCER, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 530 | mc_make_sec_cfg(RCEW, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 531 | mc_make_sec_cfg(RCEDMAR, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 532 | mc_make_sec_cfg(RCEDMAW, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 533 | mc_make_sec_cfg(NVENC1SRD, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 534 | mc_make_sec_cfg(NVENC1SWR, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 535 | mc_make_sec_cfg(PCIE0R, NON_SECURE, OVERRIDE, ENABLE), |
| 536 | mc_make_sec_cfg(PCIE0W, NON_SECURE, OVERRIDE, ENABLE), |
| 537 | mc_make_sec_cfg(PCIE1R, NON_SECURE, OVERRIDE, ENABLE), |
| 538 | mc_make_sec_cfg(PCIE1W, NON_SECURE, OVERRIDE, ENABLE), |
| 539 | mc_make_sec_cfg(PCIE2AR, NON_SECURE, OVERRIDE, ENABLE), |
| 540 | mc_make_sec_cfg(PCIE2AW, NON_SECURE, OVERRIDE, ENABLE), |
| 541 | mc_make_sec_cfg(PCIE3R, NON_SECURE, OVERRIDE, ENABLE), |
| 542 | mc_make_sec_cfg(PCIE3W, NON_SECURE, OVERRIDE, ENABLE), |
| 543 | mc_make_sec_cfg(PCIE4R, NON_SECURE, OVERRIDE, ENABLE), |
| 544 | mc_make_sec_cfg(PCIE4W, NON_SECURE, OVERRIDE, ENABLE), |
| 545 | mc_make_sec_cfg(PCIE5R, NON_SECURE, OVERRIDE, ENABLE), |
| 546 | mc_make_sec_cfg(PCIE5W, NON_SECURE, OVERRIDE, ENABLE), |
| 547 | mc_make_sec_cfg(ISPFALW, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 548 | mc_make_sec_cfg(DLA0RDA1, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 549 | mc_make_sec_cfg(DLA1RDA1, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 550 | mc_make_sec_cfg(PVA0RDA1, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 551 | mc_make_sec_cfg(PVA0RDB1, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 552 | mc_make_sec_cfg(PVA1RDA1, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 553 | mc_make_sec_cfg(PVA1RDB1, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 554 | mc_make_sec_cfg(PCIE5R1, NON_SECURE, OVERRIDE, ENABLE), |
| 555 | mc_make_sec_cfg(NVENCSRD1, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 556 | mc_make_sec_cfg(NVENC1SRD1, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 557 | mc_make_sec_cfg(ISPRA1, NON_SECURE, NO_OVERRIDE, ENABLE), |
| 558 | mc_make_sec_cfg(MIU0R, NON_SECURE, OVERRIDE, ENABLE), |
| 559 | mc_make_sec_cfg(MIU0W, NON_SECURE, OVERRIDE, ENABLE), |
| 560 | mc_make_sec_cfg(MIU1R, NON_SECURE, OVERRIDE, ENABLE), |
| 561 | mc_make_sec_cfg(MIU1W, NON_SECURE, OVERRIDE, ENABLE), |
| 562 | mc_make_sec_cfg(MIU2R, NON_SECURE, OVERRIDE, ENABLE), |
| 563 | mc_make_sec_cfg(MIU2W, NON_SECURE, OVERRIDE, ENABLE), |
| 564 | mc_make_sec_cfg(MIU3R, NON_SECURE, OVERRIDE, ENABLE), |
| 565 | mc_make_sec_cfg(MIU3W, NON_SECURE, OVERRIDE, ENABLE), |
| 566 | }; |
| 567 | |
| 568 | /******************************************************************************* |
| 569 | * Array to hold the transaction override configs |
| 570 | ******************************************************************************/ |
| 571 | const static mc_txn_override_cfg_t mc_txn_override_cfgs[] = { |
| 572 | mc_make_txn_override_cfg(NVENCSWR, CGID_TAG_ADR), |
| 573 | mc_make_txn_override_cfg(HDAW, CGID_TAG_ADR), |
| 574 | mc_make_txn_override_cfg(MPCOREW, CGID_TAG_ADR), |
| 575 | mc_make_txn_override_cfg(SATAW, CGID_TAG_ADR), |
| 576 | mc_make_txn_override_cfg(ISPWB, CGID_TAG_ADR), |
| 577 | mc_make_txn_override_cfg(XUSB_HOSTW, CGID_TAG_ADR), |
| 578 | mc_make_txn_override_cfg(XUSB_DEVW, CGID_TAG_ADR), |
| 579 | mc_make_txn_override_cfg(TSECSWR, CGID_TAG_ADR), |
| 580 | mc_make_txn_override_cfg(GPUSWR, CGID_TAG_ADR), |
| 581 | mc_make_txn_override_cfg(SDMMCWA, CGID_TAG_ADR), |
| 582 | mc_make_txn_override_cfg(SDMMCW, CGID_TAG_ADR), |
| 583 | mc_make_txn_override_cfg(SDMMCWAB, CGID_TAG_ADR), |
| 584 | mc_make_txn_override_cfg(VICSWR, CGID_TAG_ADR), |
| 585 | mc_make_txn_override_cfg(NVDECSWR, CGID_TAG_ADR), |
| 586 | mc_make_txn_override_cfg(APEW, CGID_TAG_ADR), |
| 587 | mc_make_txn_override_cfg(NVJPGSWR, CGID_TAG_ADR), |
| 588 | mc_make_txn_override_cfg(SESWR, CGID_TAG_ADR), |
| 589 | mc_make_txn_override_cfg(ETRW, CGID_TAG_ADR), |
| 590 | mc_make_txn_override_cfg(TSECSWRB, CGID_TAG_ADR), |
| 591 | mc_make_txn_override_cfg(GPUSWR2, CGID_TAG_ADR), |
| 592 | mc_make_txn_override_cfg(AXISW, CGID_TAG_ADR), |
| 593 | mc_make_txn_override_cfg(EQOSW, CGID_TAG_ADR), |
| 594 | mc_make_txn_override_cfg(UFSHCW, CGID_TAG_ADR), |
| 595 | mc_make_txn_override_cfg(BPMPW, CGID_TAG_ADR), |
| 596 | mc_make_txn_override_cfg(BPMPDMAW, CGID_TAG_ADR), |
| 597 | mc_make_txn_override_cfg(AONW, CGID_TAG_ADR), |
| 598 | mc_make_txn_override_cfg(AONDMAW, CGID_TAG_ADR), |
| 599 | mc_make_txn_override_cfg(SCEW, CGID_TAG_ADR), |
| 600 | mc_make_txn_override_cfg(SCEDMAW, CGID_TAG_ADR), |
| 601 | }; |
| 602 | |
| 603 | #endif //__MEMCTRL_PLAT_CONFIG_H |