blob: 2f764ab25782efcbbe24c236a2ae01d055940a98 [file] [log] [blame]
Sheetal Tigadoli13680c92019-12-13 10:39:06 +05301/*
2 * Copyright (c) 2016 - 2020, Broadcom
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <brcm_def.h>
8#include <plat_brcm.h>
9
10#if IMAGE_BL2
11const mmap_region_t plat_brcm_mmap[] = {
12 HSLS_REGION,
13 BRCM_MAP_SHARED_RAM,
14 BRCM_MAP_NAND_RO,
15 BRCM_MAP_QSPI_RO,
16#ifdef PERIPH0_REGION
17 PERIPH0_REGION,
18#endif
19#ifdef PERIPH1_REGION
20 PERIPH1_REGION,
21#endif
22#ifdef USE_DDR
23 BRCM_MAP_NS_DRAM1,
24#if BRCM_BL31_IN_DRAM
25 BRCM_MAP_BL31_SEC_DRAM,
26#endif
27#else
28#ifdef BRCM_MAP_EXT_SRAM
29 BRCM_MAP_EXT_SRAM,
30#endif
31#endif
32#if defined(USE_CRMU_SRAM) && defined(CRMU_SRAM_BASE)
33 CRMU_SRAM_REGION,
34#endif
35 {0}
36};
37#endif
38
Sheetal Tigadoli2a96dc22019-12-18 12:01:01 +053039#if IMAGE_BL31
40const mmap_region_t plat_brcm_mmap[] = {
41 HSLS_REGION,
42#ifdef PERIPH0_REGION
43 PERIPH0_REGION,
44#endif
45#ifdef PERIPH1_REGION
46 PERIPH1_REGION,
47#endif
48#ifdef PERIPH2_REGION
49 PERIPH2_REGION,
50#endif
51#ifdef USB_REGION
52 USB_REGION,
53#endif
54#ifdef USE_DDR
55 BRCM_MAP_NS_DRAM1,
56#ifdef BRCM_MAP_NS_SHARED_DRAM
57 BRCM_MAP_NS_SHARED_DRAM,
58#endif
59#else
60#ifdef BRCM_MAP_EXT_SRAM
61 BRCM_MAP_EXT_SRAM,
62#endif
63#endif
64#if defined(USE_CRMU_SRAM) && defined(CRMU_SRAM_BASE)
65 CRMU_SRAM_REGION,
66#endif
67 {0}
68};
69#endif
70
Sheetal Tigadoli13680c92019-12-13 10:39:06 +053071CASSERT((ARRAY_SIZE(plat_brcm_mmap) - 1) <= PLAT_BRCM_MMAP_ENTRIES,
72 assert_plat_brcm_mmap_mismatch);
73CASSERT((PLAT_BRCM_MMAP_ENTRIES + BRCM_BL_REGIONS) <= MAX_MMAP_REGIONS,
74 assert_max_mmap_regions);