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Varun Wadekar3d4e6a52015-03-13 14:01:03 +05301/*
David Cunadoc8833ea2017-04-16 17:15:08 +01002 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
Varun Wadekar3d4e6a52015-03-13 14:01:03 +05303 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Varun Wadekar3d4e6a52015-03-13 14:01:03 +05305 */
6
7#include <arch_helpers.h>
8#include <assert.h>
9#include <bl_common.h>
10#include <context_mgmt.h>
11#include <string.h>
12#include "tlkd_private.h"
13
Varun Wadekar97625e32015-03-13 14:59:03 +053014#define AT_MASK 3
15
16/*******************************************************************************
17 * This function helps the SP to translate NS/S virtual addresses.
18 ******************************************************************************/
19uint64_t tlkd_va_translate(uintptr_t va, int type)
20{
21 uint64_t pa;
22
23 if (type & TLK_TRANSLATE_NS_VADDR) {
24
25 /* save secure context */
26 cm_el1_sysregs_context_save(SECURE);
27
28 /* restore non-secure context */
29 cm_el1_sysregs_context_restore(NON_SECURE);
30
31 /* switch NS bit to start using 64-bit, non-secure mappings */
32 write_scr(cm_get_scr_el3(NON_SECURE));
33 isb();
34 }
35
36 int at = type & AT_MASK;
37 switch (at) {
38 case 0:
39 ats12e1r(va);
40 break;
41 case 1:
42 ats12e1w(va);
43 break;
44 case 2:
45 ats12e0r(va);
46 break;
47 case 3:
48 ats12e0w(va);
49 break;
50 default:
51 assert(0);
52 }
53
54 /* get the (NS/S) physical address */
55 isb();
56 pa = read_par_el1();
57
58 /* Restore secure state */
59 if (type & TLK_TRANSLATE_NS_VADDR) {
60
61 /* restore secure context */
62 cm_el1_sysregs_context_restore(SECURE);
63
64 /* switch NS bit to start using 32-bit, secure mappings */
65 write_scr(cm_get_scr_el3(SECURE));
66 isb();
67 }
68
69 return pa;
70}
71
Varun Wadekar3d4e6a52015-03-13 14:01:03 +053072/*******************************************************************************
73 * Given a secure payload entrypoint, register width, cpu id & pointer to a
74 * context data structure, this function will create a secure context ready for
75 * programming an entry into the secure payload.
76 ******************************************************************************/
77void tlkd_init_tlk_ep_state(struct entry_point_info *tlk_entry_point,
78 uint32_t rw,
79 uint64_t pc,
80 tlk_context_t *tlk_ctx)
81{
82 uint32_t ep_attr, spsr;
83
84 /* Passing a NULL context is a critical programming error */
85 assert(tlk_ctx);
86 assert(tlk_entry_point);
87 assert(pc);
88
89 /* Associate this context with the cpu specified */
90 tlk_ctx->mpidr = read_mpidr_el1();
David Cunadoc8833ea2017-04-16 17:15:08 +010091 clr_yield_smc_active_flag(tlk_ctx->state);
Varun Wadekar3d4e6a52015-03-13 14:01:03 +053092 cm_set_context(&tlk_ctx->cpu_ctx, SECURE);
93
94 if (rw == SP_AARCH64)
95 spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
96 else
97 spsr = SPSR_MODE32(MODE32_svc,
98 SPSR_T_ARM,
99 read_sctlr_el3() & SCTLR_EE_BIT,
100 DISABLE_ALL_EXCEPTIONS);
101
102 /* initialise an entrypoint to set up the CPU context */
103 ep_attr = SECURE | EP_ST_ENABLE;
104 if (read_sctlr_el3() & SCTLR_EE_BIT)
105 ep_attr |= EP_EE_BIG;
106 SET_PARAM_HEAD(tlk_entry_point, PARAM_EP, VERSION_1, ep_attr);
107
108 tlk_entry_point->pc = pc;
109 tlk_entry_point->spsr = spsr;
110}
111
112/*******************************************************************************
113 * This function takes a TLK context pointer and:
114 * 1. Applies the S-EL1 system register context from tlk_ctx->cpu_ctx.
115 * 2. Saves the current C runtime state (callee saved registers) on the stack
116 * frame and saves a reference to this state.
117 * 3. Calls el3_exit() so that the EL3 system and general purpose registers
118 * from the tlk_ctx->cpu_ctx are used to enter the secure payload image.
119 ******************************************************************************/
120uint64_t tlkd_synchronous_sp_entry(tlk_context_t *tlk_ctx)
121{
122 uint64_t rc;
123
124 /* Passing a NULL context is a critical programming error */
125 assert(tlk_ctx);
126 assert(tlk_ctx->c_rt_ctx == 0);
127
128 /* Apply the Secure EL1 system register context and switch to it */
129 assert(cm_get_context(SECURE) == &tlk_ctx->cpu_ctx);
130 cm_el1_sysregs_context_restore(SECURE);
131 cm_set_next_eret_context(SECURE);
132
133 rc = tlkd_enter_sp(&tlk_ctx->c_rt_ctx);
Antonio Nino Diaz0fbaa5c2017-10-19 16:55:48 +0100134#if ENABLE_ASSERTIONS
Varun Wadekar3d4e6a52015-03-13 14:01:03 +0530135 tlk_ctx->c_rt_ctx = 0;
136#endif
137
138 return rc;
139}
140
141/*******************************************************************************
142 * This function takes a TLK context pointer and:
143 * 1. Saves the S-EL1 system register context to tlk_ctx->cpu_ctx.
144 * 2. Restores the current C runtime state (callee saved registers) from the
145 * stack frame using reference to this state saved in tlkd_enter_sp().
146 * 3. It does not need to save any general purpose or EL3 system register state
147 * as the generic smc entry routine should have saved those.
148 ******************************************************************************/
149void tlkd_synchronous_sp_exit(tlk_context_t *tlk_ctx, uint64_t ret)
150{
151 /* Passing a NULL context is a critical programming error */
152 assert(tlk_ctx);
153
154 /* Save the Secure EL1 system register context */
155 assert(cm_get_context(SECURE) == &tlk_ctx->cpu_ctx);
156 cm_el1_sysregs_context_save(SECURE);
157
158 assert(tlk_ctx->c_rt_ctx != 0);
159 tlkd_exit_sp(tlk_ctx->c_rt_ctx, ret);
160
161 /* Should never reach here */
162 assert(0);
163}