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Haojian Zhuang602362d2017-06-01 12:15:14 +08001/*
Lukas Haneled62e842021-04-23 18:45:57 +02002 * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
Haojian Zhuang602362d2017-06-01 12:15:14 +08003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Haojian Zhuang602362d2017-06-01 12:15:14 +08007#include <assert.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008
Haojian Zhuang602362d2017-06-01 12:15:14 +08009#include <platform_def.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010
11#include <arch_helpers.h>
12#include <common/bl_common.h>
13#include <common/debug.h>
14#include <lib/mmio.h>
Lukas Haneled62e842021-04-23 18:45:57 +020015#include <lib/xlat_tables/xlat_tables_v2.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000016#include <plat/common/platform.h>
Haojian Zhuang602362d2017-06-01 12:15:14 +080017
18#include "../hikey960_def.h"
19#include "../hikey960_private.h"
20
21#define MAP_DDR MAP_REGION_FLAT(DDR_BASE, \
Haojian Zhuange3eb0b82018-01-29 12:36:03 +080022 DDR_SIZE - DDR_SEC_SIZE, \
Haojian Zhuang602362d2017-06-01 12:15:14 +080023 MT_MEMORY | MT_RW | MT_NS)
24
25#define MAP_DEVICE MAP_REGION_FLAT(DEVICE_BASE, \
26 DEVICE_SIZE, \
27 MT_DEVICE | MT_RW | MT_SECURE)
28
29#define MAP_BL1_RW MAP_REGION_FLAT(BL1_RW_BASE, \
30 BL1_RW_LIMIT - BL1_RW_BASE, \
31 MT_MEMORY | MT_RW | MT_NS)
32
33#define MAP_UFS_DATA MAP_REGION_FLAT(HIKEY960_UFS_DATA_BASE, \
34 HIKEY960_UFS_DATA_SIZE, \
35 MT_MEMORY | MT_RW | MT_NS)
36
37#define MAP_UFS_DESC MAP_REGION_FLAT(HIKEY960_UFS_DESC_BASE, \
38 HIKEY960_UFS_DESC_SIZE, \
39 MT_MEMORY | MT_RW | MT_NS)
40
Victor Chong91287682017-05-28 00:14:37 +090041#define MAP_TSP_MEM MAP_REGION_FLAT(TSP_SEC_MEM_BASE, \
42 TSP_SEC_MEM_SIZE, \
43 MT_MEMORY | MT_RW | MT_SECURE)
44
Haojian Zhuang602362d2017-06-01 12:15:14 +080045/*
46 * Table of regions for different BL stages to map using the MMU.
47 * This doesn't include Trusted RAM as the 'mem_layout' argument passed to
48 * hikey960_init_mmu_elx() will give the available subset of that,
49 */
Roberto Vargas82477962017-10-23 08:22:17 +010050#ifdef IMAGE_BL1
Haojian Zhuang602362d2017-06-01 12:15:14 +080051static const mmap_region_t hikey960_mmap[] = {
52 MAP_UFS_DATA,
53 MAP_BL1_RW,
54 MAP_UFS_DESC,
55 MAP_DEVICE,
56 {0}
57};
58#endif
59
Roberto Vargas82477962017-10-23 08:22:17 +010060#ifdef IMAGE_BL2
Haojian Zhuang602362d2017-06-01 12:15:14 +080061static const mmap_region_t hikey960_mmap[] = {
62 MAP_DDR,
63 MAP_DEVICE,
Victor Chong91287682017-05-28 00:14:37 +090064 MAP_TSP_MEM,
Haojian Zhuang602362d2017-06-01 12:15:14 +080065 {0}
66};
67#endif
68
Roberto Vargas82477962017-10-23 08:22:17 +010069#ifdef IMAGE_BL31
Haojian Zhuang602362d2017-06-01 12:15:14 +080070static const mmap_region_t hikey960_mmap[] = {
71 MAP_DEVICE,
Victor Chong91287682017-05-28 00:14:37 +090072 {0}
73};
74#endif
75
Roberto Vargas82477962017-10-23 08:22:17 +010076#ifdef IMAGE_BL32
Victor Chong91287682017-05-28 00:14:37 +090077static const mmap_region_t hikey960_mmap[] = {
78 MAP_DEVICE,
79 MAP_DDR,
Haojian Zhuang602362d2017-06-01 12:15:14 +080080 {0}
81};
82#endif
83
84/*
85 * Macro generating the code for the function setting up the pagetables as per
86 * the platform memory map & initialize the mmu, for the given exception level
87 */
88#define HIKEY960_CONFIGURE_MMU_EL(_el) \
89 void hikey960_init_mmu_el##_el(unsigned long total_base, \
90 unsigned long total_size, \
91 unsigned long ro_start, \
92 unsigned long ro_limit, \
93 unsigned long coh_start, \
94 unsigned long coh_limit) \
95 { \
96 mmap_add_region(total_base, total_base, \
97 total_size, \
98 MT_MEMORY | MT_RW | MT_SECURE); \
99 mmap_add_region(ro_start, ro_start, \
100 ro_limit - ro_start, \
101 MT_MEMORY | MT_RO | MT_SECURE); \
102 mmap_add_region(coh_start, coh_start, \
103 coh_limit - coh_start, \
104 MT_DEVICE | MT_RW | MT_SECURE); \
105 mmap_add(hikey960_mmap); \
106 init_xlat_tables(); \
107 \
108 enable_mmu_el##_el(0); \
109 }
110
111/* Define EL1 and EL3 variants of the function initialising the MMU */
112HIKEY960_CONFIGURE_MMU_EL(1)
113HIKEY960_CONFIGURE_MMU_EL(3)
114
115unsigned long plat_get_ns_image_entrypoint(void)
116{
117 return NS_BL1U_BASE;
118}
119
120unsigned int plat_get_syscnt_freq2(void)
121{
122 return 1920000;
123}