blob: 5c39633662b69e2fc9b0451af85795e5b90845d2 [file] [log] [blame]
developer1033ea12019-04-10 21:09:26 +08001/*
2 * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <asm_macros.S>
9#include <platform_def.h>
10
11 .globl plat_is_my_cpu_primary
12 .globl plat_my_core_pos
13
14func plat_is_my_cpu_primary
15 mrs x0, mpidr_el1
16 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
17 cmp x0, #PLAT_PRIMARY_CPU
18 cset x0, eq
19 ret
20endfunc plat_is_my_cpu_primary
21
22 /* -----------------------------------------------------
23 * unsigned int plat_my_core_pos(void);
24 *
25 * result: CorePos = CoreId + (ClusterId << 2)
26 * -----------------------------------------------------
27 */
28func plat_my_core_pos
29 mrs x0, mpidr_el1
30 and x1, x0, #MPIDR_CPU_MASK
31 and x0, x0, #MPIDR_CLUSTER_MASK
32 add x0, x1, x0, LSR #6
33 ret
34endfunc plat_my_core_pos