blob: 41a62618baf64c267b96fbb6e0489cf7c6190d4b [file] [log] [blame]
Antonio Nino Diaz7298c1f2018-12-05 00:09:30 +00001#
Carlo Caione189494a2019-08-23 18:28:36 +01002# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
Antonio Nino Diaz7298c1f2018-12-05 00:09:30 +00003#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include lib/xlat_tables_v2/xlat_tables.mk
8
Carlo Caione50e8a272019-08-23 19:34:44 +01009AML_PLAT := plat/amlogic
10AML_PLAT_SOC := ${AML_PLAT}/${PLAT}
11
Carlo Caione189494a2019-08-23 18:28:36 +010012DOIMAGEPATH ?= tools/amlogic
Remi Pommarel21d2e3e2019-03-30 15:58:45 +010013DOIMAGETOOL ?= ${DOIMAGEPATH}/doimage
14
Carlo Caione189494a2019-08-23 18:28:36 +010015PLAT_INCLUDES := -Iinclude/drivers/amlogic/ \
Carlo Caione50e8a272019-08-23 19:34:44 +010016 -Iinclude/drivers/amlogic/${PLAT} \
17 -I${AML_PLAT_SOC}/include
Antonio Nino Diaz7298c1f2018-12-05 00:09:30 +000018
Carlo Caione50e8a272019-08-23 19:34:44 +010019GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
Antonio Nino Diaz7298c1f2018-12-05 00:09:30 +000020 drivers/arm/gic/v2/gicv2_main.c \
21 drivers/arm/gic/v2/gicv2_helpers.c \
22 plat/common/plat_gicv2.c
23
Carlo Caione50e8a272019-08-23 19:34:44 +010024PLAT_BL_COMMON_SOURCES := drivers/amlogic/console/aarch64/meson_console.S \
25 ${AML_PLAT_SOC}/gxl_common.c \
26 ${AML_PLAT_SOC}/gxl_topology.c \
Antonio Nino Diaz7298c1f2018-12-05 00:09:30 +000027 ${XLAT_TABLES_LIB_SRCS}
28
29BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \
30 plat/common/plat_psci_common.c \
Carlo Caione50e8a272019-08-23 19:34:44 +010031 ${AML_PLAT_SOC}/aarch64/gxl_helpers.S \
32 ${AML_PLAT_SOC}/gxl_bl31_setup.c \
33 ${AML_PLAT_SOC}/gxl_efuse.c \
34 ${AML_PLAT_SOC}/gxl_mhu.c \
35 ${AML_PLAT_SOC}/gxl_pm.c \
36 ${AML_PLAT_SOC}/gxl_scpi.c \
37 ${AML_PLAT_SOC}/gxl_sip_svc.c \
38 ${AML_PLAT_SOC}/gxl_thermal.c \
39 drivers/amlogic/${PLAT}/crypto/sha_dma.c \
40 ${GIC_SOURCES}
Antonio Nino Diaz7298c1f2018-12-05 00:09:30 +000041
42# Tune compiler for Cortex-A53
43ifeq ($(notdir $(CC)),armclang)
44 TF_CFLAGS_aarch64 += -mcpu=cortex-a53
45else ifneq ($(findstring clang,$(notdir $(CC))),)
46 TF_CFLAGS_aarch64 += -mcpu=cortex-a53
47else
48 TF_CFLAGS_aarch64 += -mtune=cortex-a53
49endif
50
51# Build config flags
52# ------------------
53
54# Enable all errata workarounds for Cortex-A53
55ERRATA_A53_855873 := 1
56ERRATA_A53_819472 := 1
57ERRATA_A53_824069 := 1
58ERRATA_A53_827319 := 1
59
60WORKAROUND_CVE_2017_5715 := 0
61
62# Have different sections for code and rodata
63SEPARATE_CODE_AND_RODATA := 1
64
65# Use Coherent memory
66USE_COHERENT_MEM := 1
67
Antonio Nino Diaz7298c1f2018-12-05 00:09:30 +000068# Verify build config
69# -------------------
70
Antonio Nino Diaz7298c1f2018-12-05 00:09:30 +000071ifneq (${RESET_TO_BL31}, 0)
Carlo Caione50e8a272019-08-23 19:34:44 +010072 $(error Error: ${PLAT} needs RESET_TO_BL31=0)
Antonio Nino Diaz7298c1f2018-12-05 00:09:30 +000073endif
74
75ifeq (${ARCH},aarch32)
Carlo Caione50e8a272019-08-23 19:34:44 +010076 $(error Error: AArch32 not supported on ${PLAT})
Antonio Nino Diaz7298c1f2018-12-05 00:09:30 +000077endif
Remi Pommarel21d2e3e2019-03-30 15:58:45 +010078
79all: ${BUILD_PLAT}/bl31.img
80distclean realclean clean: cleanimage
81
82cleanimage:
83 ${Q}${MAKE} -C ${DOIMAGEPATH} clean
84
85${DOIMAGETOOL}:
86 ${Q}${MAKE} -C ${DOIMAGEPATH}
87
88${BUILD_PLAT}/bl31.img: ${BUILD_PLAT}/bl31.bin ${DOIMAGETOOL}
89 ${DOIMAGETOOL} ${BUILD_PLAT}/bl31.bin ${BUILD_PLAT}/bl31.img
90