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Antonio Nino Diaz272e8712018-09-18 01:36:00 +01001/*
Carlo Caionee5a30db2019-08-24 17:31:51 +01002 * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
Antonio Nino Diaz272e8712018-09-18 01:36:00 +01003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00007#include <common/debug.h>
8#include <common/runtime_svc.h>
9#include <lib/mmio.h>
Carlo Caione9edb6732019-08-24 17:52:40 +010010#include <platform_def.h>
11#include <stdint.h>
Carlo Caionef7c4f9b2019-09-16 12:13:49 +010012#include <string.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000013
Carlo Caionee5a30db2019-08-24 17:31:51 +010014#include "aml_private.h"
Antonio Nino Diaz272e8712018-09-18 01:36:00 +010015
Carlo Caionef7c4f9b2019-09-16 12:13:49 +010016struct aml_cpu_info {
17 uint32_t version;
18 uint8_t chip_id[16];
19};
20
21static int aml_sip_get_chip_id(uint64_t version)
22{
23 struct aml_cpu_info *info = (void *)AML_SHARE_MEM_OUTPUT_BASE;
24 uint32_t size;
25
26 if (version > 2)
27 return -1;
28
29 memset(info, 0, sizeof(struct aml_cpu_info));
30
31 if (version == 2) {
32 info->version = 2;
33 size = 16;
34 } else {
35 info->version = 1;
36 size = 12;
37 }
38
39 if (aml_scpi_get_chip_id(info->chip_id, size) == 0)
40 return -1;
41
42 return 0;
43}
44
Antonio Nino Diaz272e8712018-09-18 01:36:00 +010045/*******************************************************************************
46 * This function is responsible for handling all SiP calls
47 ******************************************************************************/
Carlo Caione107df3e2019-08-26 13:04:12 +010048static uintptr_t aml_sip_handler(uint32_t smc_fid,
Antonio Nino Diaz272e8712018-09-18 01:36:00 +010049 u_register_t x1, u_register_t x2,
50 u_register_t x3, u_register_t x4,
51 void *cookie, void *handle,
52 u_register_t flags)
53{
54 switch (smc_fid) {
55
Carlo Caione107df3e2019-08-26 13:04:12 +010056 case AML_SM_GET_SHARE_MEM_INPUT_BASE:
57 SMC_RET1(handle, AML_SHARE_MEM_INPUT_BASE);
Antonio Nino Diaz272e8712018-09-18 01:36:00 +010058
Carlo Caione107df3e2019-08-26 13:04:12 +010059 case AML_SM_GET_SHARE_MEM_OUTPUT_BASE:
60 SMC_RET1(handle, AML_SHARE_MEM_OUTPUT_BASE);
Antonio Nino Diaz272e8712018-09-18 01:36:00 +010061
Carlo Caione107df3e2019-08-26 13:04:12 +010062 case AML_SM_EFUSE_READ:
Antonio Nino Diaz272e8712018-09-18 01:36:00 +010063 {
Carlo Caione107df3e2019-08-26 13:04:12 +010064 void *dst = (void *)AML_SHARE_MEM_OUTPUT_BASE;
Carlo Caionebed18972019-08-25 17:26:27 +010065 uint64_t ret = aml_efuse_read(dst, (uint32_t)x1, x2);
Antonio Nino Diaz272e8712018-09-18 01:36:00 +010066
67 SMC_RET1(handle, ret);
68 }
Carlo Caione107df3e2019-08-26 13:04:12 +010069 case AML_SM_EFUSE_USER_MAX:
Carlo Caionebed18972019-08-25 17:26:27 +010070 SMC_RET1(handle, aml_efuse_user_max());
Antonio Nino Diaz272e8712018-09-18 01:36:00 +010071
Carlo Caione107df3e2019-08-26 13:04:12 +010072 case AML_SM_JTAG_ON:
Carlo Caione7bb83022019-08-28 10:08:24 +010073 aml_scpi_jtag_set_state(AML_JTAG_STATE_ON, x1);
Antonio Nino Diaz272e8712018-09-18 01:36:00 +010074 SMC_RET1(handle, 0);
75
Carlo Caione107df3e2019-08-26 13:04:12 +010076 case AML_SM_JTAG_OFF:
Carlo Caione7bb83022019-08-28 10:08:24 +010077 aml_scpi_jtag_set_state(AML_JTAG_STATE_OFF, x1);
Antonio Nino Diaz272e8712018-09-18 01:36:00 +010078 SMC_RET1(handle, 0);
79
Carlo Caionef7c4f9b2019-09-16 12:13:49 +010080 case AML_SM_GET_CHIP_ID:
81 SMC_RET1(handle, aml_sip_get_chip_id(x1));
82
Antonio Nino Diaz272e8712018-09-18 01:36:00 +010083 default:
84 ERROR("BL31: Unhandled SIP SMC: 0x%08x\n", smc_fid);
85 break;
86 }
87
88 SMC_RET1(handle, SMC_UNK);
89}
90
91DECLARE_RT_SVC(
Carlo Caione107df3e2019-08-26 13:04:12 +010092 aml_sip_handler,
Antonio Nino Diaz272e8712018-09-18 01:36:00 +010093
94 OEN_SIP_START,
95 OEN_SIP_END,
96 SMC_TYPE_FAST,
97 NULL,
Carlo Caione107df3e2019-08-26 13:04:12 +010098 aml_sip_handler
Antonio Nino Diaz272e8712018-09-18 01:36:00 +010099);