blob: da9b91dd6ce35e06a42a217025f79facc8b82971 [file] [log] [blame]
developer65014b82015-04-13 14:47:57 +08001/*
2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
developer65014b82015-04-13 14:47:57 +08005 */
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00006
7#include <common/debug.h>
8#include <common/runtime_svc.h>
9#include <lib/mmio.h>
10
developereee29802016-05-11 18:45:20 +080011#include <crypt.h>
developerb8925a22015-11-16 14:38:40 +080012#include <mtcmos.h>
Isla Mitchelle3631462017-07-14 10:46:32 +010013#include <mtk_sip_svc.h>
developer73b982f2016-05-11 18:04:09 +080014#include <plat_sip_calls.h>
Julius Wernere3a000d2018-03-12 13:26:49 -070015#include <wdt.h>
developer65014b82015-04-13 14:47:57 +080016
17/* Authorized secure register list */
18enum {
19 SREG_HDMI_COLOR_EN = 0x14000904
20};
21
22static const uint32_t authorized_sreg[] = {
23 SREG_HDMI_COLOR_EN
24};
25
26#define authorized_sreg_cnt \
27 (sizeof(authorized_sreg) / sizeof(authorized_sreg[0]))
28
29uint64_t mt_sip_set_authorized_sreg(uint32_t sreg, uint32_t val)
30{
31 uint64_t i;
32
33 for (i = 0; i < authorized_sreg_cnt; i++) {
34 if (authorized_sreg[i] == sreg) {
35 mmio_write_32(sreg, val);
36 return MTK_SIP_E_SUCCESS;
37 }
38 }
39
40 return MTK_SIP_E_INVALID_PARAM;
41}
developerb8925a22015-11-16 14:38:40 +080042
developer73b982f2016-05-11 18:04:09 +080043static uint64_t mt_sip_pwr_on_mtcmos(uint32_t val)
developerb8925a22015-11-16 14:38:40 +080044{
45 uint32_t ret;
46
47 ret = mtcmos_non_cpu_ctrl(1, val);
48 if (ret)
49 return MTK_SIP_E_INVALID_PARAM;
50 else
51 return MTK_SIP_E_SUCCESS;
52}
53
developer73b982f2016-05-11 18:04:09 +080054static uint64_t mt_sip_pwr_off_mtcmos(uint32_t val)
developerb8925a22015-11-16 14:38:40 +080055{
56 uint32_t ret;
57
58 ret = mtcmos_non_cpu_ctrl(0, val);
59 if (ret)
60 return MTK_SIP_E_INVALID_PARAM;
61 else
62 return MTK_SIP_E_SUCCESS;
63}
64
developer73b982f2016-05-11 18:04:09 +080065static uint64_t mt_sip_pwr_mtcmos_support(void)
developerb8925a22015-11-16 14:38:40 +080066{
67 return MTK_SIP_E_SUCCESS;
68}
developer73b982f2016-05-11 18:04:09 +080069
70uint64_t mediatek_plat_sip_handler(uint32_t smc_fid,
71 uint64_t x1,
72 uint64_t x2,
73 uint64_t x3,
74 uint64_t x4,
75 void *cookie,
76 void *handle,
77 uint64_t flags)
78{
79 uint64_t ret;
80
81 switch (smc_fid) {
82 case MTK_SIP_PWR_ON_MTCMOS:
83 ret = mt_sip_pwr_on_mtcmos((uint32_t)x1);
84 SMC_RET1(handle, ret);
85
86 case MTK_SIP_PWR_OFF_MTCMOS:
87 ret = mt_sip_pwr_off_mtcmos((uint32_t)x1);
88 SMC_RET1(handle, ret);
89
90 case MTK_SIP_PWR_MTCMOS_SUPPORT:
91 ret = mt_sip_pwr_mtcmos_support();
92 SMC_RET1(handle, ret);
93
developereee29802016-05-11 18:45:20 +080094 case MTK_SIP_SET_HDCP_KEY_EX:
95 ret = crypt_set_hdcp_key_ex(x1, x2, x3);
96 SMC_RET1(handle, ret);
97
98 case MTK_SIP_SET_HDCP_KEY_NUM:
99 ret = crypt_set_hdcp_key_num((uint32_t)x1);
100 SMC_RET1(handle, ret);
101
102 case MTK_SIP_CLR_HDCP_KEY:
103 ret = crypt_clear_hdcp_key();
104 SMC_RET1(handle, ret);
105
Julius Wernere3a000d2018-03-12 13:26:49 -0700106 case MTK_SIP_SMC_WATCHDOG:
107 return wdt_smc_handler(x1, x2, handle);
108
developer73b982f2016-05-11 18:04:09 +0800109 default:
110 ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
111 break;
112 }
113
114 SMC_RET1(handle, SMC_UNK);
115}