Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 1 | /* |
Joel Hutton | 5cc3bc8 | 2018-03-21 11:40:57 +0000 | [diff] [blame] | 2 | * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 5 | */ |
| 6 | |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 7 | #include <assert.h> |
| 8 | #include <bl_common.h> |
| 9 | #include <console.h> |
Julius Werner | c708778 | 2017-06-09 15:22:44 -0700 | [diff] [blame] | 10 | #include <coreboot.h> |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 11 | #include <debug.h> |
Antonio Nino Diaz | 2361fcc | 2016-05-05 15:25:02 +0100 | [diff] [blame] | 12 | #include <generic_delay_timer.h> |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 13 | #include <mmio.h> |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 14 | #include <plat_private.h> |
Isla Mitchell | e363146 | 2017-07-14 10:46:32 +0100 | [diff] [blame] | 15 | #include <platform.h> |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 16 | #include <platform_def.h> |
Julius Werner | c708778 | 2017-06-09 15:22:44 -0700 | [diff] [blame] | 17 | #include <uart_16550.h> |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 18 | |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 19 | /* |
| 20 | * The next 2 constants identify the extents of the code & RO data region. |
| 21 | * These addresses are used by the MMU setup code and therefore they must be |
| 22 | * page-aligned. It is the responsibility of the linker script to ensure that |
| 23 | * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses. |
| 24 | */ |
Joel Hutton | 5cc3bc8 | 2018-03-21 11:40:57 +0000 | [diff] [blame] | 25 | IMPORT_SYM(unsigned long, __RO_START__, BL31_RO_BASE); |
| 26 | IMPORT_SYM(unsigned long, __RO_END__, BL31_RO_LIMIT); |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 27 | |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 28 | static entry_point_info_t bl32_ep_info; |
| 29 | static entry_point_info_t bl33_ep_info; |
| 30 | |
| 31 | /******************************************************************************* |
| 32 | * Return a pointer to the 'entry_point_info' structure of the next image for |
| 33 | * the security state specified. BL33 corresponds to the non-secure image type |
| 34 | * while BL32 corresponds to the secure image type. A NULL pointer is returned |
| 35 | * if the image does not exist. |
| 36 | ******************************************************************************/ |
| 37 | entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) |
| 38 | { |
| 39 | entry_point_info_t *next_image_info; |
| 40 | |
| 41 | next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; |
| 42 | |
| 43 | /* None of the images on this platform can have 0x0 as the entrypoint */ |
| 44 | if (next_image_info->pc) |
| 45 | return next_image_info; |
| 46 | else |
| 47 | return NULL; |
| 48 | } |
| 49 | |
tony.xie | 54973e7 | 2017-04-24 16:18:10 +0800 | [diff] [blame] | 50 | #pragma weak params_early_setup |
| 51 | void params_early_setup(void *plat_param_from_bl2) |
| 52 | { |
| 53 | } |
| 54 | |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 55 | /******************************************************************************* |
| 56 | * Perform any BL3-1 early platform setup. Here is an opportunity to copy |
| 57 | * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they |
| 58 | * are lost (potentially). This needs to be done before the MMU is initialized |
| 59 | * so that the memory layout can be used while creating page tables. |
| 60 | * BL2 has flushed this information to memory, so we are guaranteed to pick up |
| 61 | * good data. |
| 62 | ******************************************************************************/ |
Antonio Nino Diaz | 5823090 | 2018-09-24 17:16:20 +0100 | [diff] [blame] | 63 | void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, |
| 64 | u_register_t arg2, u_register_t arg3) |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 65 | { |
Julius Werner | f39c806 | 2017-08-02 16:31:04 -0700 | [diff] [blame] | 66 | static console_16550_t console; |
Antonio Nino Diaz | 5823090 | 2018-09-24 17:16:20 +0100 | [diff] [blame] | 67 | struct rockchip_bl31_params *arg_from_bl2 = (struct rockchip_bl31_params *) arg0; |
| 68 | void *plat_params_from_bl2 = (void *) arg1; |
Julius Werner | f39c806 | 2017-08-02 16:31:04 -0700 | [diff] [blame] | 69 | |
Julius Werner | c708778 | 2017-06-09 15:22:44 -0700 | [diff] [blame] | 70 | params_early_setup(plat_params_from_bl2); |
| 71 | |
| 72 | #if COREBOOT |
| 73 | if (coreboot_serial.type) |
Julius Werner | f39c806 | 2017-08-02 16:31:04 -0700 | [diff] [blame] | 74 | console_16550_register(coreboot_serial.baseaddr, |
| 75 | coreboot_serial.input_hertz, |
| 76 | coreboot_serial.baud, |
| 77 | &console); |
Julius Werner | c708778 | 2017-06-09 15:22:44 -0700 | [diff] [blame] | 78 | #else |
Julius Werner | f39c806 | 2017-08-02 16:31:04 -0700 | [diff] [blame] | 79 | console_16550_register(PLAT_RK_UART_BASE, PLAT_RK_UART_CLOCK, |
| 80 | PLAT_RK_UART_BAUDRATE, &console); |
Julius Werner | c708778 | 2017-06-09 15:22:44 -0700 | [diff] [blame] | 81 | #endif |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 82 | |
| 83 | VERBOSE("bl31_setup\n"); |
| 84 | |
| 85 | /* Passing a NULL context is a critical programming error */ |
Antonio Nino Diaz | 5823090 | 2018-09-24 17:16:20 +0100 | [diff] [blame] | 86 | assert(arg_from_bl2); |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 87 | |
Antonio Nino Diaz | 5823090 | 2018-09-24 17:16:20 +0100 | [diff] [blame] | 88 | assert(arg_from_bl2->h.type == PARAM_BL31); |
| 89 | assert(arg_from_bl2->h.version >= VERSION_1); |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 90 | |
Antonio Nino Diaz | 5823090 | 2018-09-24 17:16:20 +0100 | [diff] [blame] | 91 | bl32_ep_info = *arg_from_bl2->bl32_ep_info; |
| 92 | bl33_ep_info = *arg_from_bl2->bl33_ep_info; |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 93 | } |
| 94 | |
| 95 | /******************************************************************************* |
| 96 | * Perform any BL3-1 platform setup code |
| 97 | ******************************************************************************/ |
| 98 | void bl31_platform_setup(void) |
| 99 | { |
Antonio Nino Diaz | 2361fcc | 2016-05-05 15:25:02 +0100 | [diff] [blame] | 100 | generic_delay_timer_init(); |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 101 | plat_rockchip_soc_init(); |
| 102 | |
| 103 | /* Initialize the gic cpu and distributor interfaces */ |
| 104 | plat_rockchip_gic_driver_init(); |
| 105 | plat_rockchip_gic_init(); |
| 106 | plat_rockchip_pmu_init(); |
| 107 | } |
| 108 | |
| 109 | /******************************************************************************* |
| 110 | * Perform the very early platform specific architectural setup here. At the |
| 111 | * moment this is only intializes the mmu in a quick and dirty way. |
| 112 | ******************************************************************************/ |
| 113 | void bl31_plat_arch_setup(void) |
| 114 | { |
| 115 | plat_cci_init(); |
| 116 | plat_cci_enable(); |
| 117 | plat_configure_mmu_el3(BL31_RO_BASE, |
Masahiro Yamada | 0fac5af | 2016-12-28 16:11:41 +0900 | [diff] [blame] | 118 | BL_COHERENT_RAM_END - BL31_RO_BASE, |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 119 | BL31_RO_BASE, |
| 120 | BL31_RO_LIMIT, |
Masahiro Yamada | 0fac5af | 2016-12-28 16:11:41 +0900 | [diff] [blame] | 121 | BL_COHERENT_RAM_BASE, |
| 122 | BL_COHERENT_RAM_END); |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 123 | } |