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git01.mediatek.com / filogic / atf / 4f29fb7826b1860d2c75f2ffcc19e635b5787e64 / . / bl2 / aarch64 / bl2_el3_entrypoint.S
blob: d1e42471877be950d5a521a3979d257084fad1a2 [file] [log] [blame]
Roberto Vargase0e99462017-10-30 14:43:43 +0000[diff] [blame]1/*
Antonio Nino Diaz4f29fb72019-01-31 17:40:44 +0000[diff] [blame^]2 * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
Roberto Vargase0e99462017-10-30 14:43:43 +0000[diff] [blame]3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <asm_macros.S>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +0000[diff] [blame]9#include <common/bl_common.h>
Roberto Vargase0e99462017-10-30 14:43:43 +0000[diff] [blame]10#include <el3_common_macros.S>
11
12 .globl bl2_entrypoint
13 .globl bl2_vector_table
14 .globl bl2_el3_run_image
15 .globl bl2_run_next_image
16
17func bl2_entrypoint
18 /* Save arguments x0-x3 from previous Boot loader */
19 mov x20, x0
20 mov x21, x1
21 mov x22, x2
22 mov x23, x3
23
24 el3_entrypoint_common \
25 _init_sctlr=1 \
26 _warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS \
27 _secondary_cold_boot=!COLD_BOOT_SINGLE_CPU \
28 _init_memory=1 \
29 _init_c_runtime=1 \
30 _exception_vectors=bl2_el3_exceptions
31
Antonio Nino Diaz4f29fb72019-01-31 17:40:44 +0000[diff] [blame^]32 /* ---------------------------------------------
Roberto Vargase0e99462017-10-30 14:43:43 +0000[diff] [blame]33 * Restore parameters of boot rom
Antonio Nino Diaz4f29fb72019-01-31 17:40:44 +0000[diff] [blame^]34 * ---------------------------------------------
Roberto Vargase0e99462017-10-30 14:43:43 +0000[diff] [blame]35 */
36 mov x0, x20
37 mov x1, x21
38 mov x2, x22
39 mov x3, x23
40
Antonio Nino Diaz4f29fb72019-01-31 17:40:44 +0000[diff] [blame^]41 /* ---------------------------------------------
42 * Perform BL2 setup
43 * ---------------------------------------------
44 */
45 bl bl2_el3_setup
46
47 /* ---------------------------------------------
48 * Enable pointer authentication
49 * ---------------------------------------------
50 */
51#if ENABLE_PAUTH
52 mrs x0, sctlr_el3
53 orr x0, x0, #SCTLR_EnIA_BIT
54 msr sctlr_el3, x0
55 isb
56#endif /* ENABLE_PAUTH */
Roberto Vargase0e99462017-10-30 14:43:43 +0000[diff] [blame]57
58 /* ---------------------------------------------
59 * Jump to main function.
60 * ---------------------------------------------
61 */
62 bl bl2_main
63
64 /* ---------------------------------------------
65 * Should never reach this point.
66 * ---------------------------------------------
67 */
68 no_ret plat_panic_handler
69endfunc bl2_entrypoint
70
71func bl2_run_next_image
72 mov x20,x0
Antonio Nino Diaz4f29fb72019-01-31 17:40:44 +0000[diff] [blame^]73 /* ---------------------------------------------
74 * MMU needs to be disabled because both BL2 and BL31 execute
75 * in EL3, and therefore share the same address space.
76 * BL31 will initialize the address space according to its
77 * own requirement.
78 * ---------------------------------------------
79 */
Roberto Vargase0e99462017-10-30 14:43:43 +0000[diff] [blame]80 bl disable_mmu_icache_el3
81 tlbi alle3
82 bl bl2_el3_plat_prepare_exit
83
Antonio Nino Diaz4f29fb72019-01-31 17:40:44 +0000[diff] [blame^]84 /* ---------------------------------------------
85 * Disable pointer authentication before jumping to BL31 or that will
86 * cause an authentication failure during the early platform init.
87 * ---------------------------------------------
88 */
89#if ENABLE_PAUTH
90 mrs x0, sctlr_el3
91 bic x0, x0, #SCTLR_EnIA_BIT
92 msr sctlr_el3, x0
93 isb
94#endif /* ENABLE_PAUTH */
95
Roberto Vargase0e99462017-10-30 14:43:43 +0000[diff] [blame]96 ldp x0, x1, [x20, #ENTRY_POINT_INFO_PC_OFFSET]
97 msr elr_el3, x0
98 msr spsr_el3, x1
99
100 ldp x6, x7, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x30)]
101 ldp x4, x5, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x20)]
102 ldp x2, x3, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x10)]
103 ldp x0, x1, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x0)]
104 eret
105endfunc bl2_run_next_image