Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
Vikram Kanigiri | 4e97e54 | 2015-02-26 15:25:58 +0000 | [diff] [blame^] | 30 | #include <cci.h> |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 31 | #include <gic_v2.h> |
Dan Handley | 1c54d97 | 2014-06-20 12:02:01 +0100 | [diff] [blame] | 32 | #include <plat_config.h> |
Dan Handley | be234f9 | 2014-08-04 16:11:15 +0100 | [diff] [blame] | 33 | #include "../fvp_def.h" |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 34 | |
| 35 | .section .rodata.gic_reg_name, "aS" |
Soby Mathew | 383c477 | 2014-09-01 12:29:27 +0100 | [diff] [blame] | 36 | gicc_regs: |
| 37 | .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", "" |
Soby Mathew | c1adbbc | 2014-06-25 10:07:40 +0100 | [diff] [blame] | 38 | gicd_pend_reg: |
| 39 | .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n Offset:\t\t\tvalue\n" |
| 40 | newline: |
| 41 | .asciz "\n" |
| 42 | spacer: |
| 43 | .asciz ":\t\t0x" |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 44 | |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 45 | /* --------------------------------------------- |
| 46 | * The below macro prints out relevant GIC |
| 47 | * registers whenever an unhandled exception is |
Sandrine Bailleux | 046cd3f | 2014-08-06 11:27:23 +0100 | [diff] [blame] | 48 | * taken in BL3-1. |
Soby Mathew | 383c477 | 2014-09-01 12:29:27 +0100 | [diff] [blame] | 49 | * Clobbers: x0 - x10, x16, x17, sp |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 50 | * --------------------------------------------- |
| 51 | */ |
| 52 | .macro plat_print_gic_regs |
Soby Mathew | 383c477 | 2014-09-01 12:29:27 +0100 | [diff] [blame] | 53 | mov_imm x0, (VE_SYSREGS_BASE + V2M_SYS_ID) |
| 54 | ldr w16, [x0] |
| 55 | /* Extract BLD (12th - 15th bits) from the SYS_ID */ |
| 56 | ubfx x16, x16, #SYS_ID_BLD_SHIFT, #4 |
| 57 | /* Check if VE mmap */ |
| 58 | cmp w16, #BLD_GIC_VE_MMAP |
| 59 | b.eq use_ve_mmap |
| 60 | /* Check if Cortex-A53/A57 mmap */ |
| 61 | cmp w16, #BLD_GIC_A53A57_MMAP |
| 62 | b.ne exit_print_gic_regs |
| 63 | mov_imm x17, BASE_GICC_BASE |
| 64 | mov_imm x16, BASE_GICD_BASE |
| 65 | b print_gicc_regs |
| 66 | use_ve_mmap: |
| 67 | mov_imm x17, VE_GICC_BASE |
| 68 | mov_imm x16, VE_GICD_BASE |
| 69 | print_gicc_regs: |
| 70 | /* gicc base address is now in x17 */ |
| 71 | adr x6, gicc_regs /* Load the gicc reg list to x6 */ |
| 72 | /* Load the gicc regs to gp regs used by str_in_crash_buf_print */ |
| 73 | ldr w8, [x17, #GICC_HPPIR] |
| 74 | ldr w9, [x17, #GICC_AHPPIR] |
| 75 | ldr w10, [x17, #GICC_CTLR] |
Sandrine Bailleux | 046cd3f | 2014-08-06 11:27:23 +0100 | [diff] [blame] | 76 | /* Store to the crash buf and print to console */ |
Soby Mathew | c1adbbc | 2014-06-25 10:07:40 +0100 | [diff] [blame] | 77 | bl str_in_crash_buf_print |
| 78 | |
| 79 | /* Print the GICD_ISPENDR regs */ |
| 80 | add x7, x16, #GICD_ISPENDR |
| 81 | adr x4, gicd_pend_reg |
| 82 | bl asm_print_str |
Soby Mathew | 1218f11 | 2014-08-19 11:26:00 +0100 | [diff] [blame] | 83 | gicd_ispendr_loop: |
Soby Mathew | c1adbbc | 2014-06-25 10:07:40 +0100 | [diff] [blame] | 84 | sub x4, x7, x16 |
| 85 | cmp x4, #0x280 |
Soby Mathew | 1218f11 | 2014-08-19 11:26:00 +0100 | [diff] [blame] | 86 | b.eq exit_print_gic_regs |
Soby Mathew | c1adbbc | 2014-06-25 10:07:40 +0100 | [diff] [blame] | 87 | bl asm_print_hex |
| 88 | adr x4, spacer |
| 89 | bl asm_print_str |
| 90 | ldr x4, [x7], #8 |
| 91 | bl asm_print_hex |
| 92 | adr x4, newline |
| 93 | bl asm_print_str |
Soby Mathew | 1218f11 | 2014-08-19 11:26:00 +0100 | [diff] [blame] | 94 | b gicd_ispendr_loop |
| 95 | exit_print_gic_regs: |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 96 | .endm |
Soby Mathew | 0da9593 | 2014-07-16 09:23:52 +0100 | [diff] [blame] | 97 | |
| 98 | .section .rodata.cci_reg_name, "aS" |
| 99 | cci_iface_regs: |
| 100 | .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , "" |
| 101 | |
| 102 | /* ------------------------------------------------ |
| 103 | * The below macro prints out relevant interconnect |
| 104 | * registers whenever an unhandled exception is |
Sandrine Bailleux | 046cd3f | 2014-08-06 11:27:23 +0100 | [diff] [blame] | 105 | * taken in BL3-1. |
Soby Mathew | 0da9593 | 2014-07-16 09:23:52 +0100 | [diff] [blame] | 106 | * Clobbers: x0 - x9, sp |
| 107 | * ------------------------------------------------ |
| 108 | */ |
| 109 | .macro plat_print_interconnect_regs |
| 110 | adr x6, cci_iface_regs |
| 111 | /* Store in x7 the base address of the first interface */ |
| 112 | mov_imm x7, (CCI400_BASE + SLAVE_IFACE3_OFFSET) |
| 113 | ldr w8, [x7, #SNOOP_CTRL_REG] |
| 114 | /* Store in x7 the base address of the second interface */ |
| 115 | mov_imm x7, (CCI400_BASE + SLAVE_IFACE4_OFFSET) |
| 116 | ldr w9, [x7, #SNOOP_CTRL_REG] |
| 117 | /* Store to the crash buf and print to console */ |
| 118 | bl str_in_crash_buf_print |
| 119 | .endm |