Soby Mathew | 47e43f2 | 2016-02-01 14:04:34 +0000 | [diff] [blame] | 1 | /* |
Roberto Vargas | 2b36b15 | 2018-02-12 12:36:17 +0000 | [diff] [blame] | 2 | * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. |
Soby Mathew | 47e43f2 | 2016-02-01 14:04:34 +0000 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Soby Mathew | 47e43f2 | 2016-02-01 14:04:34 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
Antonio Nino Diaz | bd7b740 | 2019-01-25 14:30:04 +0000 | [diff] [blame] | 7 | #include <plat/arm/common/plat_arm.h> |
| 8 | #include <plat/arm/css/common/css_pm.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 9 | #include <plat/common/platform.h> |
Antonio Nino Diaz | a320ecd | 2019-01-15 14:19:50 +0000 | [diff] [blame] | 10 | #include <platform_def.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 11 | |
Chandni Cherukuri | 61f3a7c | 2018-10-11 14:08:08 +0530 | [diff] [blame] | 12 | #include "../../css/drivers/scmi/scmi.h" |
| 13 | #include "../../css/drivers/mhu/css_mhu_doorbell.h" |
| 14 | |
Sudeep Holla | 52c7ab3 | 2018-11-01 16:17:30 +0000 | [diff] [blame] | 15 | #if CSS_USE_SCMI_SDS_DRIVER |
Chandni Cherukuri | 61f3a7c | 2018-10-11 14:08:08 +0530 | [diff] [blame] | 16 | static scmi_channel_plat_info_t juno_scmi_plat_info = { |
| 17 | .scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE, |
| 18 | .db_reg_addr = PLAT_CSS_MHU_BASE + CSS_SCMI_MHU_DB_REG_OFF, |
| 19 | .db_preserve_mask = 0xfffffffe, |
| 20 | .db_modify_mask = 0x1, |
| 21 | .ring_doorbell = &mhu_ring_doorbell, |
| 22 | }; |
| 23 | |
| 24 | scmi_channel_plat_info_t *plat_css_get_scmi_info() |
| 25 | { |
| 26 | return &juno_scmi_plat_info; |
| 27 | } |
Soby Mathew | 47e43f2 | 2016-02-01 14:04:34 +0000 | [diff] [blame] | 28 | |
Sudeep Holla | 52c7ab3 | 2018-11-01 16:17:30 +0000 | [diff] [blame] | 29 | #endif |
Soby Mathew | 47e43f2 | 2016-02-01 14:04:34 +0000 | [diff] [blame] | 30 | /* |
| 31 | * On Juno, the system power level is the highest power level. |
| 32 | * The first entry in the power domain descriptor specifies the |
| 33 | * number of system power domains i.e. 1. |
| 34 | */ |
| 35 | #define JUNO_PWR_DOMAINS_AT_MAX_PWR_LVL ARM_SYSTEM_COUNT |
| 36 | |
| 37 | /* |
| 38 | * The Juno power domain tree descriptor. The cluster power domains |
| 39 | * are arranged so that when the PSCI generic code creates the power |
| 40 | * domain tree, the indices of the CPU power domain nodes it allocates |
| 41 | * match the linear indices returned by plat_core_pos_by_mpidr() |
| 42 | * i.e. CLUSTER1 CPUs are allocated indices from 0 to 3 and the higher |
| 43 | * indices for CLUSTER0 CPUs. |
| 44 | */ |
Roberto Vargas | 2b36b15 | 2018-02-12 12:36:17 +0000 | [diff] [blame] | 45 | static const unsigned char juno_power_domain_tree_desc[] = { |
Soby Mathew | 47e43f2 | 2016-02-01 14:04:34 +0000 | [diff] [blame] | 46 | /* No of root nodes */ |
| 47 | JUNO_PWR_DOMAINS_AT_MAX_PWR_LVL, |
| 48 | /* No of children for the root node */ |
| 49 | JUNO_CLUSTER_COUNT, |
| 50 | /* No of children for the first cluster node */ |
| 51 | JUNO_CLUSTER1_CORE_COUNT, |
| 52 | /* No of children for the second cluster node */ |
| 53 | JUNO_CLUSTER0_CORE_COUNT |
| 54 | }; |
| 55 | |
| 56 | /******************************************************************************* |
| 57 | * This function returns the Juno topology tree information. |
| 58 | ******************************************************************************/ |
| 59 | const unsigned char *plat_get_power_domain_tree_desc(void) |
| 60 | { |
| 61 | return juno_power_domain_tree_desc; |
| 62 | } |
| 63 | |
| 64 | /******************************************************************************* |
| 65 | * This function returns the core count within the cluster corresponding to |
| 66 | * `mpidr`. |
| 67 | ******************************************************************************/ |
| 68 | unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr) |
| 69 | { |
Sathees Balya | 30952cc | 2018-09-27 14:41:02 +0100 | [diff] [blame] | 70 | return (((mpidr & (u_register_t) 0x100) != 0U) ? |
| 71 | JUNO_CLUSTER1_CORE_COUNT : JUNO_CLUSTER0_CORE_COUNT); |
Soby Mathew | 47e43f2 | 2016-02-01 14:04:34 +0000 | [diff] [blame] | 72 | } |
Soby Mathew | cbafd7a | 2016-11-14 12:44:32 +0000 | [diff] [blame] | 73 | |
| 74 | /* |
| 75 | * The array mapping platform core position (implemented by plat_my_core_pos()) |
| 76 | * to the SCMI power domain ID implemented by SCP. |
| 77 | */ |
| 78 | const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[PLATFORM_CORE_COUNT] = { |
| 79 | 2, 3, 4, 5, 0, 1 }; |