Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 1 | /* |
Rajan Vaja | 02d1842 | 2019-03-04 11:09:39 +0530 | [diff] [blame] | 2 | * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | /* |
| 8 | * Top-level SMC handler for ZynqMP power management calls and |
| 9 | * IPI setup functions for communication with PMU. |
| 10 | */ |
| 11 | |
| 12 | #include <errno.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 13 | |
| 14 | #include <common/runtime_svc.h> |
| 15 | #if ZYNQMP_WDT_RESTART |
| 16 | #include <arch_helpers.h> |
| 17 | #include <drivers/arm/gicv2.h> |
| 18 | #include <lib/mmio.h> |
| 19 | #include <lib/spinlock.h> |
| 20 | #include <plat/common/platform.h> |
| 21 | #endif |
| 22 | |
Jolly Shah | 0bfd700 | 2019-01-08 11:10:47 -0800 | [diff] [blame] | 23 | #include <plat_private.h> |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 24 | #include "pm_api_sys.h" |
| 25 | #include "pm_client.h" |
| 26 | #include "pm_ipi.h" |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 27 | |
Rajan Vaja | 02d1842 | 2019-03-04 11:09:39 +0530 | [diff] [blame] | 28 | #define PM_GET_CALLBACK_DATA 0xa01 |
Siva Durga Prasad Paladugu | 43b23a3 | 2018-04-27 16:26:47 +0530 | [diff] [blame] | 29 | #define PM_SET_SUSPEND_MODE 0xa02 |
Rajan Vaja | c7ee23d | 2018-02-14 23:10:54 -0800 | [diff] [blame] | 30 | #define PM_GET_TRUSTZONE_VERSION 0xa03 |
Soren Brinkmann | 84f0af4 | 2016-09-30 14:24:25 -0700 | [diff] [blame] | 31 | |
Siva Durga Prasad Paladugu | 79f7595 | 2018-04-30 19:39:49 +0530 | [diff] [blame] | 32 | /* !0 - UP, 0 - DOWN */ |
| 33 | static int32_t pm_up = 0; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 34 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 35 | #if ZYNQMP_WDT_RESTART |
| 36 | static spinlock_t inc_lock; |
| 37 | static int active_cores = 0; |
| 38 | #endif |
| 39 | |
| 40 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 41 | /** |
| 42 | * pm_context - Structure which contains data for power management |
| 43 | * @api_version version of PM API, must match with one on PMU side |
| 44 | * @payload payload array used to store received |
| 45 | * data from ipi buffer registers |
| 46 | */ |
| 47 | static struct { |
| 48 | uint32_t api_version; |
| 49 | uint32_t payload[PAYLOAD_ARG_CNT]; |
| 50 | } pm_ctx; |
| 51 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 52 | #if ZYNQMP_WDT_RESTART |
| 53 | /** |
| 54 | * trigger_wdt_restart() - Trigger warm restart event to APU cores |
| 55 | * |
| 56 | * This function triggers SGI for all active APU CPUs. SGI handler then |
| 57 | * power down CPU and call system reset. |
| 58 | */ |
| 59 | static void trigger_wdt_restart(void) |
| 60 | { |
| 61 | uint32_t core_count = 0; |
| 62 | uint32_t core_status[3]; |
| 63 | uint32_t target_cpu_list = 0; |
| 64 | int i; |
| 65 | |
| 66 | for (i = 0; i < 4; i++) { |
| 67 | pm_get_node_status(NODE_APU_0 + i, core_status); |
| 68 | if (core_status[0] == 1) { |
| 69 | core_count++; |
| 70 | target_cpu_list |= (1 << i); |
| 71 | } |
| 72 | } |
| 73 | |
| 74 | spin_lock(&inc_lock); |
| 75 | active_cores = core_count; |
| 76 | spin_unlock(&inc_lock); |
| 77 | |
| 78 | INFO("Active Cores: %d\n", active_cores); |
| 79 | |
Siva Durga Prasad Paladugu | 60bfbc9 | 2018-09-24 22:51:49 -0700 | [diff] [blame] | 80 | for (i = PLATFORM_CORE_COUNT - 1; i >= 0; i--) { |
| 81 | if (target_cpu_list & (1 << i)) { |
| 82 | /* trigger SGI to active cores */ |
| 83 | plat_ic_raise_el3_sgi(ARM_IRQ_SEC_SGI_7, i); |
| 84 | } |
| 85 | } |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 86 | } |
| 87 | |
| 88 | /** |
| 89 | * ttc_fiq_handler() - TTC Handler for timer event |
| 90 | * @id number of the highest priority pending interrupt of the type |
| 91 | * that this handler was registered for |
| 92 | * @flags security state, bit[0] |
| 93 | * @handler pointer to 'cpu_context' structure of the current CPU for the |
| 94 | * security state specified in the 'flags' parameter |
| 95 | * @cookie unused |
| 96 | * |
| 97 | * Function registered as INTR_TYPE_EL3 interrupt handler |
| 98 | * |
| 99 | * When WDT event is received in PMU, PMU needs to notify master to do cleanup |
| 100 | * if required. PMU sets up timer and starts timer to overflow in zero time upon |
| 101 | * WDT event. ATF handles this timer event and takes necessary action required |
| 102 | * for warm restart. |
| 103 | * |
| 104 | * In presence of non-secure software layers (EL1/2) sets the interrupt |
| 105 | * at registered entrance in GIC and informs that PMU responsed or demands |
| 106 | * action. |
| 107 | */ |
| 108 | static uint64_t ttc_fiq_handler(uint32_t id, uint32_t flags, void *handle, |
| 109 | void *cookie) |
| 110 | { |
| 111 | INFO("BL31: Got TTC FIQ\n"); |
| 112 | |
Siva Durga Prasad Paladugu | 60bfbc9 | 2018-09-24 22:51:49 -0700 | [diff] [blame] | 113 | plat_ic_end_of_interrupt(id); |
| 114 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 115 | /* Clear TTC interrupt by reading interrupt register */ |
| 116 | mmio_read_32(TTC3_INTR_REGISTER_1); |
| 117 | |
| 118 | /* Disable the timer interrupts */ |
| 119 | mmio_write_32(TTC3_INTR_ENABLE_1, 0); |
| 120 | |
| 121 | trigger_wdt_restart(); |
| 122 | |
| 123 | return 0; |
| 124 | } |
| 125 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 126 | /** |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 127 | * zynqmp_sgi7_irq() - Handler for SGI7 IRQ |
| 128 | * @id number of the highest priority pending interrupt of the type |
| 129 | * that this handler was registered for |
| 130 | * @flags security state, bit[0] |
| 131 | * @handler pointer to 'cpu_context' structure of the current CPU for the |
| 132 | * security state specified in the 'flags' parameter |
| 133 | * @cookie unused |
| 134 | * |
| 135 | * Function registered as INTR_TYPE_EL3 interrupt handler |
| 136 | * |
| 137 | * On receiving WDT event from PMU, ATF generates SGI7 to all running CPUs. |
| 138 | * In response to SGI7 interrupt, each CPUs do clean up if required and last |
| 139 | * running CPU calls system restart. |
| 140 | */ |
| 141 | static uint64_t __unused __dead2 zynqmp_sgi7_irq(uint32_t id, uint32_t flags, |
| 142 | void *handle, void *cookie) |
| 143 | { |
| 144 | int i; |
| 145 | /* enter wfi and stay there */ |
| 146 | INFO("Entering wfi\n"); |
| 147 | |
| 148 | spin_lock(&inc_lock); |
| 149 | active_cores--; |
| 150 | |
| 151 | for (i = 0; i < 4; i++) { |
| 152 | mmio_write_32(BASE_GICD_BASE + GICD_CPENDSGIR + 4 * i, |
| 153 | 0xffffffff); |
| 154 | } |
| 155 | |
| 156 | spin_unlock(&inc_lock); |
| 157 | |
| 158 | if (active_cores == 0) { |
| 159 | pm_system_shutdown(PMF_SHUTDOWN_TYPE_RESET, |
| 160 | PMF_SHUTDOWN_SUBTYPE_SUBSYSTEM); |
| 161 | } |
| 162 | |
| 163 | /* enter wfi and stay there */ |
| 164 | while (1) |
| 165 | wfi(); |
| 166 | } |
| 167 | |
| 168 | /** |
| 169 | * pm_wdt_restart_setup() - Setup warm restart interrupts |
| 170 | * |
| 171 | * This function sets up handler for SGI7 and TTC interrupts |
| 172 | * used for warm restart. |
| 173 | */ |
| 174 | static int pm_wdt_restart_setup(void) |
| 175 | { |
| 176 | int ret; |
| 177 | |
| 178 | /* register IRQ handler for SGI7 */ |
| 179 | ret = request_intr_type_el3(ARM_IRQ_SEC_SGI_7, zynqmp_sgi7_irq); |
| 180 | if (ret) { |
| 181 | WARN("BL31: registering SGI7 interrupt failed\n"); |
| 182 | goto err; |
| 183 | } |
| 184 | |
| 185 | ret = request_intr_type_el3(IRQ_TTC3_1, ttc_fiq_handler); |
| 186 | if (ret) |
| 187 | WARN("BL31: registering TTC3 interrupt failed\n"); |
| 188 | |
| 189 | err: |
| 190 | return ret; |
| 191 | } |
| 192 | #endif |
| 193 | |
| 194 | /** |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 195 | * pm_setup() - PM service setup |
| 196 | * |
| 197 | * @return On success, the initialization function must return 0. |
| 198 | * Any other return value will cause the framework to ignore |
| 199 | * the service |
| 200 | * |
| 201 | * Initialization functions for ZynqMP power management for |
| 202 | * communicaton with PMU. |
| 203 | * |
| 204 | * Called from sip_svc_setup initialization function with the |
| 205 | * rt_svc_init signature. |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 206 | */ |
| 207 | int pm_setup(void) |
| 208 | { |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 209 | int status, ret; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 210 | |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 211 | status = pm_ipi_init(primary_proc); |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 212 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 213 | #if ZYNQMP_WDT_RESTART |
| 214 | status = pm_wdt_restart_setup(); |
| 215 | if (status) |
| 216 | WARN("BL31: warm-restart setup failed\n"); |
| 217 | #endif |
| 218 | |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 219 | if (status >= 0) { |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 220 | INFO("BL31: PM Service Init Complete: API v%d.%d\n", |
| 221 | PM_VERSION_MAJOR, PM_VERSION_MINOR); |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 222 | ret = 0; |
| 223 | } else { |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 224 | INFO("BL31: PM Service Init Failed, Error Code %d!\n", status); |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 225 | ret = status; |
| 226 | } |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 227 | |
Siva Durga Prasad Paladugu | 79f7595 | 2018-04-30 19:39:49 +0530 | [diff] [blame] | 228 | pm_up = !status; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 229 | |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 230 | return ret; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 231 | } |
| 232 | |
| 233 | /** |
| 234 | * pm_smc_handler() - SMC handler for PM-API calls coming from EL1/EL2. |
| 235 | * @smc_fid - Function Identifier |
| 236 | * @x1 - x4 - Arguments |
| 237 | * @cookie - Unused |
| 238 | * @handler - Pointer to caller's context structure |
| 239 | * |
| 240 | * @return - Unused |
| 241 | * |
| 242 | * Determines that smc_fid is valid and supported PM SMC Function ID from the |
| 243 | * list of pm_api_ids, otherwise completes the request with |
| 244 | * the unknown SMC Function ID |
| 245 | * |
| 246 | * The SMC calls for PM service are forwarded from SIP Service SMC handler |
| 247 | * function with rt_svc_handle signature |
| 248 | */ |
| 249 | uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, |
| 250 | uint64_t x4, void *cookie, void *handle, uint64_t flags) |
| 251 | { |
| 252 | enum pm_ret_status ret; |
| 253 | |
| 254 | uint32_t pm_arg[4]; |
| 255 | |
| 256 | /* Handle case where PM wasn't initialized properly */ |
Siva Durga Prasad Paladugu | 79f7595 | 2018-04-30 19:39:49 +0530 | [diff] [blame] | 257 | if (!pm_up) |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 258 | SMC_RET1(handle, SMC_UNK); |
| 259 | |
| 260 | pm_arg[0] = (uint32_t)x1; |
| 261 | pm_arg[1] = (uint32_t)(x1 >> 32); |
| 262 | pm_arg[2] = (uint32_t)x2; |
| 263 | pm_arg[3] = (uint32_t)(x2 >> 32); |
| 264 | |
| 265 | switch (smc_fid & FUNCID_NUM_MASK) { |
| 266 | /* PM API Functions */ |
| 267 | case PM_SELF_SUSPEND: |
| 268 | ret = pm_self_suspend(pm_arg[0], pm_arg[1], pm_arg[2], |
| 269 | pm_arg[3]); |
| 270 | SMC_RET1(handle, (uint64_t)ret); |
| 271 | |
| 272 | case PM_REQ_SUSPEND: |
| 273 | ret = pm_req_suspend(pm_arg[0], pm_arg[1], pm_arg[2], |
| 274 | pm_arg[3]); |
| 275 | SMC_RET1(handle, (uint64_t)ret); |
| 276 | |
| 277 | case PM_REQ_WAKEUP: |
Filip Drazic | 78ba145 | 2017-02-07 12:03:57 +0100 | [diff] [blame] | 278 | { |
| 279 | /* Use address flag is encoded in the 1st bit of the low-word */ |
| 280 | unsigned int set_addr = pm_arg[1] & 0x1; |
| 281 | uint64_t address = (uint64_t)pm_arg[2] << 32; |
| 282 | |
| 283 | address |= pm_arg[1] & (~0x1); |
| 284 | ret = pm_req_wakeup(pm_arg[0], set_addr, address, |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 285 | pm_arg[3]); |
| 286 | SMC_RET1(handle, (uint64_t)ret); |
Filip Drazic | 78ba145 | 2017-02-07 12:03:57 +0100 | [diff] [blame] | 287 | } |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 288 | |
| 289 | case PM_FORCE_POWERDOWN: |
| 290 | ret = pm_force_powerdown(pm_arg[0], pm_arg[1]); |
| 291 | SMC_RET1(handle, (uint64_t)ret); |
| 292 | |
| 293 | case PM_ABORT_SUSPEND: |
| 294 | ret = pm_abort_suspend(pm_arg[0]); |
| 295 | SMC_RET1(handle, (uint64_t)ret); |
| 296 | |
| 297 | case PM_SET_WAKEUP_SOURCE: |
| 298 | ret = pm_set_wakeup_source(pm_arg[0], pm_arg[1], pm_arg[2]); |
| 299 | SMC_RET1(handle, (uint64_t)ret); |
| 300 | |
| 301 | case PM_SYSTEM_SHUTDOWN: |
Soren Brinkmann | 58fbb9b | 2016-09-02 09:50:54 -0700 | [diff] [blame] | 302 | ret = pm_system_shutdown(pm_arg[0], pm_arg[1]); |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 303 | SMC_RET1(handle, (uint64_t)ret); |
| 304 | |
| 305 | case PM_REQ_NODE: |
| 306 | ret = pm_req_node(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3]); |
| 307 | SMC_RET1(handle, (uint64_t)ret); |
| 308 | |
| 309 | case PM_RELEASE_NODE: |
| 310 | ret = pm_release_node(pm_arg[0]); |
| 311 | SMC_RET1(handle, (uint64_t)ret); |
| 312 | |
| 313 | case PM_SET_REQUIREMENT: |
| 314 | ret = pm_set_requirement(pm_arg[0], pm_arg[1], pm_arg[2], |
| 315 | pm_arg[3]); |
| 316 | SMC_RET1(handle, (uint64_t)ret); |
| 317 | |
| 318 | case PM_SET_MAX_LATENCY: |
| 319 | ret = pm_set_max_latency(pm_arg[0], pm_arg[1]); |
| 320 | SMC_RET1(handle, (uint64_t)ret); |
| 321 | |
| 322 | case PM_GET_API_VERSION: |
| 323 | /* Check is PM API version already verified */ |
Soren Brinkmann | a1b0a90 | 2016-09-30 11:30:21 -0700 | [diff] [blame] | 324 | if (pm_ctx.api_version == PM_VERSION) { |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 325 | SMC_RET1(handle, (uint64_t)PM_RET_SUCCESS | |
| 326 | ((uint64_t)PM_VERSION << 32)); |
Soren Brinkmann | a1b0a90 | 2016-09-30 11:30:21 -0700 | [diff] [blame] | 327 | } |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 328 | |
| 329 | ret = pm_get_api_version(&pm_ctx.api_version); |
Soren Brinkmann | a1b0a90 | 2016-09-30 11:30:21 -0700 | [diff] [blame] | 330 | /* |
| 331 | * Enable IPI IRQ |
| 332 | * assume the rich OS is OK to handle callback IRQs now. |
| 333 | * Even if we were wrong, it would not enable the IRQ in |
| 334 | * the GIC. |
| 335 | */ |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 336 | pm_ipi_irq_enable(primary_proc); |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 337 | SMC_RET1(handle, (uint64_t)ret | |
| 338 | ((uint64_t)pm_ctx.api_version << 32)); |
| 339 | |
| 340 | case PM_SET_CONFIGURATION: |
| 341 | ret = pm_set_configuration(pm_arg[0]); |
| 342 | SMC_RET1(handle, (uint64_t)ret); |
| 343 | |
Filip Drazic | f2ddd91 | 2017-03-15 11:50:47 +0100 | [diff] [blame] | 344 | case PM_INIT_FINALIZE: |
| 345 | ret = pm_init_finalize(); |
| 346 | SMC_RET1(handle, (uint64_t)ret); |
| 347 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 348 | case PM_GET_NODE_STATUS: |
Anes Hadziahmetagic | 1caf88e | 2017-01-27 18:42:44 +0100 | [diff] [blame] | 349 | { |
| 350 | uint32_t buff[3]; |
| 351 | |
| 352 | ret = pm_get_node_status(pm_arg[0], buff); |
| 353 | SMC_RET2(handle, (uint64_t)ret | ((uint64_t)buff[0] << 32), |
| 354 | (uint64_t)buff[1] | ((uint64_t)buff[2] << 32)); |
| 355 | } |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 356 | |
| 357 | case PM_GET_OP_CHARACTERISTIC: |
Anes Hadziahmetagic | 92aee01 | 2016-05-12 16:17:30 +0200 | [diff] [blame] | 358 | { |
| 359 | uint32_t result; |
| 360 | |
| 361 | ret = pm_get_op_characteristic(pm_arg[0], pm_arg[1], &result); |
| 362 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)result << 32)); |
| 363 | } |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 364 | |
| 365 | case PM_REGISTER_NOTIFIER: |
| 366 | ret = pm_register_notifier(pm_arg[0], pm_arg[1], pm_arg[2], |
| 367 | pm_arg[3]); |
| 368 | SMC_RET1(handle, (uint64_t)ret); |
| 369 | |
| 370 | case PM_RESET_ASSERT: |
| 371 | ret = pm_reset_assert(pm_arg[0], pm_arg[1]); |
| 372 | SMC_RET1(handle, (uint64_t)ret); |
| 373 | |
| 374 | case PM_RESET_GET_STATUS: |
| 375 | { |
| 376 | uint32_t reset_status; |
| 377 | |
| 378 | ret = pm_reset_get_status(pm_arg[0], &reset_status); |
| 379 | SMC_RET1(handle, (uint64_t)ret | |
| 380 | ((uint64_t)reset_status << 32)); |
| 381 | } |
| 382 | |
| 383 | /* PM memory access functions */ |
| 384 | case PM_MMIO_WRITE: |
| 385 | ret = pm_mmio_write(pm_arg[0], pm_arg[1], pm_arg[2]); |
| 386 | SMC_RET1(handle, (uint64_t)ret); |
| 387 | |
| 388 | case PM_MMIO_READ: |
| 389 | { |
| 390 | uint32_t value; |
| 391 | |
| 392 | ret = pm_mmio_read(pm_arg[0], &value); |
| 393 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 394 | } |
Nava kishore Manne | 68d460c | 2016-08-20 23:18:09 +0530 | [diff] [blame] | 395 | |
| 396 | case PM_FPGA_LOAD: |
| 397 | ret = pm_fpga_load(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3]); |
| 398 | SMC_RET1(handle, (uint64_t)ret); |
| 399 | |
| 400 | case PM_FPGA_GET_STATUS: |
| 401 | { |
| 402 | uint32_t value; |
| 403 | |
| 404 | ret = pm_fpga_get_status(&value); |
| 405 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 406 | } |
| 407 | |
Siva Durga Prasad Paladugu | 16427d1 | 2016-08-24 11:45:47 +0530 | [diff] [blame] | 408 | case PM_GET_CHIPID: |
Soren Brinkmann | cb36681 | 2016-09-22 12:21:11 -0700 | [diff] [blame] | 409 | { |
| 410 | uint32_t result[2]; |
| 411 | |
| 412 | ret = pm_get_chipid(result); |
| 413 | SMC_RET2(handle, (uint64_t)ret | ((uint64_t)result[0] << 32), |
| 414 | result[1]); |
| 415 | } |
Siva Durga Prasad Paladugu | 16427d1 | 2016-08-24 11:45:47 +0530 | [diff] [blame] | 416 | |
Siva Durga Prasad Paladugu | de93d98 | 2018-04-30 15:49:27 +0530 | [diff] [blame] | 417 | case PM_SECURE_RSA_AES: |
| 418 | ret = pm_secure_rsaaes(pm_arg[0], pm_arg[1], pm_arg[2], |
| 419 | pm_arg[3]); |
| 420 | SMC_RET1(handle, (uint64_t)ret); |
| 421 | |
Rajan Vaja | 02d1842 | 2019-03-04 11:09:39 +0530 | [diff] [blame] | 422 | case PM_GET_CALLBACK_DATA: |
| 423 | { |
| 424 | uint32_t result[4] = {0}; |
| 425 | |
Tejas Patel | f4c3a25 | 2020-01-29 22:06:12 -0800 | [diff] [blame] | 426 | pm_get_callbackdata(result, ARRAY_SIZE(result)); |
Rajan Vaja | 02d1842 | 2019-03-04 11:09:39 +0530 | [diff] [blame] | 427 | SMC_RET2(handle, |
| 428 | (uint64_t)result[0] | ((uint64_t)result[1] << 32), |
| 429 | (uint64_t)result[2] | ((uint64_t)result[3] << 32)); |
| 430 | } |
| 431 | |
Rajan Vaja | 8368761 | 2018-01-17 02:39:20 -0800 | [diff] [blame] | 432 | case PM_PINCTRL_REQUEST: |
| 433 | ret = pm_pinctrl_request(pm_arg[0]); |
| 434 | SMC_RET1(handle, (uint64_t)ret); |
| 435 | |
| 436 | case PM_PINCTRL_RELEASE: |
| 437 | ret = pm_pinctrl_release(pm_arg[0]); |
| 438 | SMC_RET1(handle, (uint64_t)ret); |
| 439 | |
| 440 | case PM_PINCTRL_GET_FUNCTION: |
| 441 | { |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 442 | uint32_t value = 0; |
Rajan Vaja | 8368761 | 2018-01-17 02:39:20 -0800 | [diff] [blame] | 443 | |
| 444 | ret = pm_pinctrl_get_function(pm_arg[0], &value); |
| 445 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 446 | } |
| 447 | |
| 448 | case PM_PINCTRL_SET_FUNCTION: |
| 449 | ret = pm_pinctrl_set_function(pm_arg[0], pm_arg[1]); |
| 450 | SMC_RET1(handle, (uint64_t)ret); |
| 451 | |
| 452 | case PM_PINCTRL_CONFIG_PARAM_GET: |
| 453 | { |
| 454 | uint32_t value; |
| 455 | |
| 456 | ret = pm_pinctrl_get_config(pm_arg[0], pm_arg[1], &value); |
| 457 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 458 | } |
| 459 | |
| 460 | case PM_PINCTRL_CONFIG_PARAM_SET: |
| 461 | ret = pm_pinctrl_set_config(pm_arg[0], pm_arg[1], pm_arg[2]); |
| 462 | SMC_RET1(handle, (uint64_t)ret); |
| 463 | |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 464 | case PM_IOCTL: |
| 465 | { |
| 466 | uint32_t value; |
| 467 | |
| 468 | ret = pm_ioctl(pm_arg[0], pm_arg[1], pm_arg[2], |
| 469 | pm_arg[3], &value); |
| 470 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 471 | } |
| 472 | |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 473 | case PM_QUERY_DATA: |
| 474 | { |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 475 | uint32_t data[4] = { 0 }; |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 476 | |
Rajan Vaja | cd82568 | 2020-11-23 21:33:39 -0800 | [diff] [blame] | 477 | pm_query_data(pm_arg[0], pm_arg[1], pm_arg[2], |
| 478 | pm_arg[3], data); |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 479 | SMC_RET2(handle, (uint64_t)data[0] | ((uint64_t)data[1] << 32), |
| 480 | (uint64_t)data[2] | ((uint64_t)data[3] << 32)); |
| 481 | } |
| 482 | |
| 483 | case PM_CLOCK_ENABLE: |
| 484 | ret = pm_clock_enable(pm_arg[0]); |
| 485 | SMC_RET1(handle, (uint64_t)ret); |
| 486 | |
| 487 | case PM_CLOCK_DISABLE: |
| 488 | ret = pm_clock_disable(pm_arg[0]); |
| 489 | SMC_RET1(handle, (uint64_t)ret); |
| 490 | |
| 491 | case PM_CLOCK_GETSTATE: |
| 492 | { |
| 493 | uint32_t value; |
| 494 | |
| 495 | ret = pm_clock_getstate(pm_arg[0], &value); |
| 496 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 497 | } |
| 498 | |
| 499 | case PM_CLOCK_SETDIVIDER: |
| 500 | ret = pm_clock_setdivider(pm_arg[0], pm_arg[1]); |
| 501 | SMC_RET1(handle, (uint64_t)ret); |
| 502 | |
| 503 | case PM_CLOCK_GETDIVIDER: |
| 504 | { |
| 505 | uint32_t value; |
| 506 | |
| 507 | ret = pm_clock_getdivider(pm_arg[0], &value); |
| 508 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 509 | } |
| 510 | |
| 511 | case PM_CLOCK_SETRATE: |
| 512 | ret = pm_clock_setrate(pm_arg[0], |
| 513 | ((uint64_t)pm_arg[2]) << 32 | pm_arg[1]); |
| 514 | |
| 515 | SMC_RET1(handle, (uint64_t)ret); |
| 516 | |
| 517 | case PM_CLOCK_GETRATE: |
| 518 | { |
| 519 | uint64_t value; |
| 520 | |
| 521 | ret = pm_clock_getrate(pm_arg[0], &value); |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 522 | SMC_RET2(handle, (uint64_t)ret | |
| 523 | (((uint64_t)value & 0xFFFFFFFFU) << 32U), |
| 524 | (value >> 32U) & 0xFFFFFFFFU); |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 525 | |
| 526 | } |
| 527 | |
| 528 | case PM_CLOCK_SETPARENT: |
| 529 | ret = pm_clock_setparent(pm_arg[0], pm_arg[1]); |
| 530 | SMC_RET1(handle, (uint64_t)ret); |
| 531 | |
| 532 | case PM_CLOCK_GETPARENT: |
| 533 | { |
| 534 | uint32_t value; |
| 535 | |
| 536 | ret = pm_clock_getparent(pm_arg[0], &value); |
| 537 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 538 | } |
| 539 | |
Rajan Vaja | c7ee23d | 2018-02-14 23:10:54 -0800 | [diff] [blame] | 540 | case PM_GET_TRUSTZONE_VERSION: |
| 541 | SMC_RET1(handle, (uint64_t)PM_RET_SUCCESS | |
| 542 | ((uint64_t)ZYNQMP_TZ_VERSION << 32)); |
| 543 | |
Siva Durga Prasad Paladugu | 43b23a3 | 2018-04-27 16:26:47 +0530 | [diff] [blame] | 544 | case PM_SET_SUSPEND_MODE: |
| 545 | ret = pm_set_suspend_mode(pm_arg[0]); |
| 546 | SMC_RET1(handle, (uint64_t)ret); |
| 547 | |
Siva Durga Prasad Paladugu | f3994cc | 2018-05-01 11:12:55 +0530 | [diff] [blame] | 548 | case PM_SECURE_SHA: |
| 549 | ret = pm_sha_hash(pm_arg[0], pm_arg[1], pm_arg[2], |
| 550 | pm_arg[3]); |
| 551 | SMC_RET1(handle, (uint64_t)ret); |
| 552 | |
| 553 | case PM_SECURE_RSA: |
| 554 | ret = pm_rsa_core(pm_arg[0], pm_arg[1], pm_arg[2], |
| 555 | pm_arg[3]); |
| 556 | SMC_RET1(handle, (uint64_t)ret); |
| 557 | |
Siva Durga Prasad Paladugu | a4ed4b2 | 2018-04-30 20:06:58 +0530 | [diff] [blame] | 558 | case PM_SECURE_IMAGE: |
| 559 | { |
| 560 | uint32_t result[2]; |
| 561 | |
| 562 | ret = pm_secure_image(pm_arg[0], pm_arg[1], pm_arg[2], |
| 563 | pm_arg[3], &result[0]); |
| 564 | SMC_RET2(handle, (uint64_t)ret | ((uint64_t)result[0] << 32), |
| 565 | result[1]); |
| 566 | } |
| 567 | |
Siva Durga Prasad Paladugu | 7c6516a | 2018-09-04 17:41:34 +0530 | [diff] [blame] | 568 | case PM_FPGA_READ: |
| 569 | { |
| 570 | uint32_t value; |
| 571 | |
| 572 | ret = pm_fpga_read(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3], |
| 573 | &value); |
| 574 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 575 | } |
| 576 | |
Siva Durga Prasad Paladugu | 8bd905b | 2018-09-04 18:05:50 +0530 | [diff] [blame] | 577 | case PM_SECURE_AES: |
| 578 | { |
| 579 | uint32_t value; |
| 580 | |
| 581 | ret = pm_aes_engine(pm_arg[0], pm_arg[1], &value); |
| 582 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 583 | } |
| 584 | |
Jolly Shah | a7cc5ee | 2019-01-02 12:27:00 -0800 | [diff] [blame] | 585 | case PM_PLL_SET_PARAMETER: |
| 586 | ret = pm_pll_set_parameter(pm_arg[0], pm_arg[1], pm_arg[2]); |
| 587 | SMC_RET1(handle, (uint64_t)ret); |
| 588 | |
Jolly Shah | cb2f45d | 2019-01-04 11:28:38 -0800 | [diff] [blame] | 589 | case PM_PLL_GET_PARAMETER: |
| 590 | { |
| 591 | uint32_t value; |
| 592 | |
| 593 | ret = pm_pll_get_parameter(pm_arg[0], pm_arg[1], &value); |
| 594 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value << 32)); |
| 595 | } |
| 596 | |
Jolly Shah | 1f0d585 | 2019-01-04 11:32:31 -0800 | [diff] [blame] | 597 | case PM_PLL_SET_MODE: |
| 598 | ret = pm_pll_set_mode(pm_arg[0], pm_arg[1]); |
| 599 | SMC_RET1(handle, (uint64_t)ret); |
| 600 | |
Jolly Shah | 141421e | 2019-01-04 11:35:48 -0800 | [diff] [blame] | 601 | case PM_PLL_GET_MODE: |
| 602 | { |
| 603 | uint32_t mode; |
| 604 | |
| 605 | ret = pm_pll_get_mode(pm_arg[0], &mode); |
| 606 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)mode << 32)); |
| 607 | } |
| 608 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 609 | default: |
| 610 | WARN("Unimplemented PM Service Call: 0x%x\n", smc_fid); |
| 611 | SMC_RET1(handle, SMC_UNK); |
| 612 | } |
| 613 | } |