Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | #include <arch.h> |
| 31 | #include <asm_macros.S> |
| 32 | #include <context.h> |
Andrew Thoelke | 8c28fe0 | 2014-06-02 11:40:35 +0100 | [diff] [blame] | 33 | #include <cpu_data.h> |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 34 | #include <plat_macros.S> |
Sandrine Bailleux | af1ef2b | 2014-05-27 15:46:07 +0100 | [diff] [blame] | 35 | #include <platform_def.h> |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 36 | |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 37 | .globl dump_state_and_die |
| 38 | .globl dump_intr_state_and_die |
Andrew Thoelke | 8c28fe0 | 2014-06-02 11:40:35 +0100 | [diff] [blame] | 39 | .globl init_crash_reporting |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 40 | |
Andrew Thoelke | 385f4d4 | 2014-06-03 11:50:53 +0100 | [diff] [blame] | 41 | #if CRASH_REPORTING |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 42 | /* ------------------------------------------------------ |
| 43 | * The below section deals with dumping the system state |
| 44 | * when an unhandled exception is taken in EL3. |
| 45 | * The layout and the names of the registers which will |
| 46 | * be dumped during a unhandled exception is given below. |
| 47 | * ------------------------------------------------------ |
| 48 | */ |
| 49 | .section .rodata.dump_reg_name, "aS" |
| 50 | caller_saved_regs: .asciz "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",\ |
| 51 | "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16",\ |
| 52 | "x17", "x18", "" |
| 53 | |
| 54 | callee_saved_regs: .asciz "x19", "x20", "x21", "x22", "x23", "x24",\ |
| 55 | "x25", "x26", "x27", "x28", "x29", "x30", "" |
| 56 | |
| 57 | el3_sys_regs: .asciz "scr_el3", "sctlr_el3", "cptr_el3", "tcr_el3",\ |
| 58 | "daif", "mair_el3", "spsr_el3", "elr_el3", "ttbr0_el3", "esr_el3",\ |
| 59 | "sp_el3", "far_el3", "" |
| 60 | |
| 61 | non_el3_sys_0_regs: .asciz "spsr_el1", "elr_el1", "spsr_abt", "spsr_und",\ |
| 62 | "spsr_irq", "spsr_fiq", "sctlr_el1", "actlr_el1", "cpacr_el1",\ |
| 63 | "csselr_el1", "sp_el1", "esr_el1", "ttbr0_el1", "ttbr1_el1",\ |
| 64 | "mair_el1", "amair_el1", "tcr_el1", "tpidr_el1", "" |
| 65 | |
| 66 | non_el3_sys_1_regs: .asciz "tpidr_el0", "tpidrro_el0", "dacr32_el2",\ |
| 67 | "ifsr32_el2", "par_el1", "far_el1", "afsr0_el1", "afsr1_el1",\ |
| 68 | "contextidr_el1", "vbar_el1", "cntp_ctl_el0", "cntp_cval_el0",\ |
| 69 | "cntv_ctl_el0", "cntv_cval_el0", "cntkctl_el1", "fpexc32_el2",\ |
| 70 | "sp_el0", "" |
| 71 | |
| 72 | /* ----------------------------------------------------- |
| 73 | * Currently we are stack limited. Hence make sure that |
| 74 | * we dont try to dump more than 20 registers using the |
| 75 | * stack. |
| 76 | * ----------------------------------------------------- |
| 77 | */ |
| 78 | |
| 79 | #define REG_SIZE 0x8 |
| 80 | |
| 81 | /* The caller saved registers are X0 to X18 */ |
| 82 | #define CALLER_SAVED_REG_SIZE (20 * REG_SIZE) |
| 83 | /* The caller saved registers are X19 to X30 */ |
| 84 | #define CALLEE_SAVED_REG_SIZE (12 * REG_SIZE) |
| 85 | /* The EL3 sys regs*/ |
| 86 | #define EL3_SYS_REG_SIZE (12 * REG_SIZE) |
| 87 | /* The non EL3 sys regs set-0 */ |
| 88 | #define NON_EL3_SYS_0_REG_SIZE (18 * REG_SIZE) |
| 89 | /* The non EL3 sys regs set-1 */ |
| 90 | #define NON_EL3_SYS_1_REG_SIZE (18 * REG_SIZE) |
| 91 | |
| 92 | .macro print_caller_saved_regs |
| 93 | sub sp, sp, #CALLER_SAVED_REG_SIZE |
| 94 | stp x0, x1, [sp] |
| 95 | stp x2, x3, [sp, #(REG_SIZE * 2)] |
| 96 | stp x4, x5, [sp, #(REG_SIZE * 4)] |
| 97 | stp x6, x7, [sp, #(REG_SIZE * 6)] |
| 98 | stp x8, x9, [sp, #(REG_SIZE * 8)] |
| 99 | stp x10, x11, [sp, #(REG_SIZE * 10)] |
| 100 | stp x12, x13, [sp, #(REG_SIZE * 12)] |
| 101 | stp x14, x15, [sp, #(REG_SIZE * 14)] |
| 102 | stp x16, x17, [sp, #(REG_SIZE * 16)] |
| 103 | stp x18, xzr, [sp, #(REG_SIZE * 18)] |
| 104 | adr x0, caller_saved_regs |
| 105 | mov x1, sp |
| 106 | bl print_string_value |
| 107 | add sp, sp, #CALLER_SAVED_REG_SIZE |
| 108 | .endm |
| 109 | |
| 110 | .macro print_callee_saved_regs |
| 111 | sub sp, sp, CALLEE_SAVED_REG_SIZE |
| 112 | stp x19, x20, [sp] |
| 113 | stp x21, x22, [sp, #(REG_SIZE * 2)] |
| 114 | stp x23, x24, [sp, #(REG_SIZE * 4)] |
| 115 | stp x25, x26, [sp, #(REG_SIZE * 6)] |
| 116 | stp x27, x28, [sp, #(REG_SIZE * 8)] |
| 117 | stp x29, x30, [sp, #(REG_SIZE * 10)] |
| 118 | adr x0, callee_saved_regs |
| 119 | mov x1, sp |
| 120 | bl print_string_value |
| 121 | add sp, sp, #CALLEE_SAVED_REG_SIZE |
| 122 | .endm |
| 123 | |
| 124 | .macro print_el3_sys_regs |
| 125 | sub sp, sp, #EL3_SYS_REG_SIZE |
| 126 | mrs x9, scr_el3 |
| 127 | mrs x10, sctlr_el3 |
| 128 | mrs x11, cptr_el3 |
| 129 | mrs x12, tcr_el3 |
| 130 | mrs x13, daif |
| 131 | mrs x14, mair_el3 |
| 132 | mrs x15, spsr_el3 /*save the elr and spsr regs seperately*/ |
| 133 | mrs x16, elr_el3 |
| 134 | mrs x17, ttbr0_el3 |
| 135 | mrs x8, esr_el3 |
| 136 | mrs x7, far_el3 |
| 137 | |
| 138 | stp x9, x10, [sp] |
| 139 | stp x11, x12, [sp, #(REG_SIZE * 2)] |
| 140 | stp x13, x14, [sp, #(REG_SIZE * 4)] |
| 141 | stp x15, x16, [sp, #(REG_SIZE * 6)] |
| 142 | stp x17, x8, [sp, #(REG_SIZE * 8)] |
| 143 | stp x0, x7, [sp, #(REG_SIZE * 10)] /* sp_el3 is in x0 */ |
| 144 | |
| 145 | adr x0, el3_sys_regs |
| 146 | mov x1, sp |
| 147 | bl print_string_value |
| 148 | add sp, sp, #EL3_SYS_REG_SIZE |
| 149 | .endm |
| 150 | |
| 151 | .macro print_non_el3_sys_0_regs |
| 152 | sub sp, sp, #NON_EL3_SYS_0_REG_SIZE |
| 153 | mrs x9, spsr_el1 |
| 154 | mrs x10, elr_el1 |
| 155 | mrs x11, spsr_abt |
| 156 | mrs x12, spsr_und |
| 157 | mrs x13, spsr_irq |
| 158 | mrs x14, spsr_fiq |
| 159 | mrs x15, sctlr_el1 |
| 160 | mrs x16, actlr_el1 |
| 161 | mrs x17, cpacr_el1 |
| 162 | mrs x8, csselr_el1 |
| 163 | |
| 164 | stp x9, x10, [sp] |
| 165 | stp x11, x12, [sp, #(REG_SIZE * 2)] |
| 166 | stp x13, x14, [sp, #(REG_SIZE * 4)] |
| 167 | stp x15, x16, [sp, #(REG_SIZE * 6)] |
| 168 | stp x17, x8, [sp, #(REG_SIZE * 8)] |
| 169 | |
| 170 | mrs x10, sp_el1 |
| 171 | mrs x11, esr_el1 |
| 172 | mrs x12, ttbr0_el1 |
| 173 | mrs x13, ttbr1_el1 |
| 174 | mrs x14, mair_el1 |
| 175 | mrs x15, amair_el1 |
| 176 | mrs x16, tcr_el1 |
| 177 | mrs x17, tpidr_el1 |
| 178 | |
| 179 | stp x10, x11, [sp, #(REG_SIZE * 10)] |
| 180 | stp x12, x13, [sp, #(REG_SIZE * 12)] |
| 181 | stp x14, x15, [sp, #(REG_SIZE * 14)] |
| 182 | stp x16, x17, [sp, #(REG_SIZE * 16)] |
| 183 | |
| 184 | adr x0, non_el3_sys_0_regs |
| 185 | mov x1, sp |
| 186 | bl print_string_value |
| 187 | add sp, sp, #NON_EL3_SYS_0_REG_SIZE |
| 188 | .endm |
| 189 | |
| 190 | .macro print_non_el3_sys_1_regs |
| 191 | sub sp, sp, #NON_EL3_SYS_1_REG_SIZE |
| 192 | |
| 193 | mrs x9, tpidr_el0 |
| 194 | mrs x10, tpidrro_el0 |
| 195 | mrs x11, dacr32_el2 |
| 196 | mrs x12, ifsr32_el2 |
| 197 | mrs x13, par_el1 |
| 198 | mrs x14, far_el1 |
| 199 | mrs x15, afsr0_el1 |
| 200 | mrs x16, afsr1_el1 |
| 201 | mrs x17, contextidr_el1 |
| 202 | mrs x8, vbar_el1 |
| 203 | |
| 204 | stp x9, x10, [sp] |
| 205 | stp x11, x12, [sp, #(REG_SIZE * 2)] |
| 206 | stp x13, x14, [sp, #(REG_SIZE * 4)] |
| 207 | stp x15, x16, [sp, #(REG_SIZE * 6)] |
| 208 | stp x17, x8, [sp, #(REG_SIZE * 8)] |
| 209 | |
| 210 | mrs x10, cntp_ctl_el0 |
| 211 | mrs x11, cntp_cval_el0 |
| 212 | mrs x12, cntv_ctl_el0 |
| 213 | mrs x13, cntv_cval_el0 |
| 214 | mrs x14, cntkctl_el1 |
| 215 | mrs x15, fpexc32_el2 |
| 216 | mrs x8, sp_el0 |
| 217 | |
| 218 | stp x10, x11, [sp, #(REG_SIZE *10)] |
| 219 | stp x12, x13, [sp, #(REG_SIZE * 12)] |
| 220 | stp x14, x15, [sp, #(REG_SIZE * 14)] |
| 221 | stp x8, xzr, [sp, #(REG_SIZE * 16)] |
| 222 | |
| 223 | adr x0, non_el3_sys_1_regs |
| 224 | mov x1, sp |
| 225 | bl print_string_value |
| 226 | add sp, sp, #NON_EL3_SYS_1_REG_SIZE |
| 227 | .endm |
| 228 | |
| 229 | .macro init_crash_stack |
| 230 | msr cntfrq_el0, x0 /* we can corrupt this reg to free up x0 */ |
| 231 | mrs x0, tpidr_el3 |
| 232 | |
| 233 | /* Check if tpidr is initialized */ |
| 234 | cbz x0, infinite_loop |
| 235 | |
Andrew Thoelke | 8c28fe0 | 2014-06-02 11:40:35 +0100 | [diff] [blame] | 236 | ldr x0, [x0, #CPU_DATA_CRASH_STACK_OFFSET] |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 237 | /* store the x30 and sp to stack */ |
| 238 | str x30, [x0, #-(REG_SIZE)]! |
| 239 | mov x30, sp |
| 240 | str x30, [x0, #-(REG_SIZE)]! |
| 241 | mov sp, x0 |
| 242 | mrs x0, cntfrq_el0 |
| 243 | .endm |
| 244 | |
| 245 | /* --------------------------------------------------- |
| 246 | * The below function initializes the crash dump stack , |
| 247 | * and prints the system state. This function |
| 248 | * will not return. |
| 249 | * --------------------------------------------------- |
| 250 | */ |
| 251 | func dump_state_and_die |
| 252 | init_crash_stack |
| 253 | print_caller_saved_regs |
| 254 | b print_state |
| 255 | |
| 256 | func dump_intr_state_and_die |
| 257 | init_crash_stack |
| 258 | print_caller_saved_regs |
| 259 | plat_print_gic_regs /* fall through to print_state */ |
| 260 | |
| 261 | print_state: |
| 262 | /* copy the original x30 from stack */ |
| 263 | ldr x30, [sp, #REG_SIZE] |
| 264 | print_callee_saved_regs |
| 265 | /* copy the original SP_EL3 from stack to x0 and rewind stack */ |
| 266 | ldr x0, [sp], #(REG_SIZE * 2) |
| 267 | print_el3_sys_regs |
| 268 | print_non_el3_sys_0_regs |
| 269 | print_non_el3_sys_1_regs |
Andrew Thoelke | 385f4d4 | 2014-06-03 11:50:53 +0100 | [diff] [blame] | 270 | |
| 271 | #else /* CRASH_REPORING */ |
| 272 | |
| 273 | func dump_state_and_die |
| 274 | dump_intr_state_and_die: |
| 275 | |
| 276 | #endif /* CRASH_REPORING */ |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 277 | |
Andrew Thoelke | 385f4d4 | 2014-06-03 11:50:53 +0100 | [diff] [blame] | 278 | infinite_loop: |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 279 | b infinite_loop |
| 280 | |
| 281 | |
| 282 | #define PCPU_CRASH_STACK_SIZE 0x140 |
| 283 | |
| 284 | /* ----------------------------------------------------- |
Andrew Thoelke | 8c28fe0 | 2014-06-02 11:40:35 +0100 | [diff] [blame] | 285 | * Per-cpu crash stacks in normal memory. |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 286 | * ----------------------------------------------------- |
| 287 | */ |
Andrew Thoelke | 8c28fe0 | 2014-06-02 11:40:35 +0100 | [diff] [blame] | 288 | declare_stack pcpu_crash_stack, tzfw_normal_stacks, \ |
| 289 | PCPU_CRASH_STACK_SIZE, PLATFORM_CORE_COUNT |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 290 | |
| 291 | /* ----------------------------------------------------- |
Andrew Thoelke | 8c28fe0 | 2014-06-02 11:40:35 +0100 | [diff] [blame] | 292 | * Provides each CPU with a small stacks for reporting |
| 293 | * unhandled exceptions, and stores the stack address |
| 294 | * in cpu_data |
| 295 | * |
| 296 | * This can be called without a runtime stack |
| 297 | * clobbers: x0 - x4 |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 298 | * ----------------------------------------------------- |
| 299 | */ |
Andrew Thoelke | 8c28fe0 | 2014-06-02 11:40:35 +0100 | [diff] [blame] | 300 | func init_crash_reporting |
| 301 | mov x4, x30 |
| 302 | mov x2, #0 |
| 303 | adr x3, pcpu_crash_stack |
| 304 | init_crash_loop: |
| 305 | mov x0, x2 |
| 306 | bl _cpu_data_by_index |
| 307 | add x3, x3, #PCPU_CRASH_STACK_SIZE |
| 308 | str x3, [x0, #CPU_DATA_CRASH_STACK_OFFSET] |
| 309 | add x2, x2, #1 |
| 310 | cmp x2, #PLATFORM_CORE_COUNT |
| 311 | b.lo init_crash_loop |
| 312 | ret x4 |