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Chandni Cherukurif7813232018-09-16 21:06:29 +05301#
Vijayenthiran Subramaniamf5cb00f2019-12-27 19:27:57 +05302# Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
Chandni Cherukurif7813232018-09-16 21:06:29 +05303#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include plat/arm/css/sgi/sgi-common.mk
8
Chandni Cherukuri15ec1e52019-02-22 13:41:03 +05309RDN1EDGE_BASE = plat/arm/board/rdn1edge
Chandni Cherukurif7813232018-09-16 21:06:29 +053010
Chandni Cherukuri15ec1e52019-02-22 13:41:03 +053011PLAT_INCLUDES += -I${RDN1EDGE_BASE}/include/
Chandni Cherukurif7813232018-09-16 21:06:29 +053012
John Tsichritzis56369c12019-02-19 13:49:06 +000013SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_n1.S
Chandni Cherukurif7813232018-09-16 21:06:29 +053014
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +010015BL1_SOURCES += ${SGI_CPU_SOURCES} \
16 ${RDN1EDGE_BASE}/rdn1edge_err.c
Chandni Cherukurif7813232018-09-16 21:06:29 +053017
Chandni Cherukuri15ec1e52019-02-22 13:41:03 +053018BL2_SOURCES += ${RDN1EDGE_BASE}/rdn1edge_plat.c \
19 ${RDN1EDGE_BASE}/rdn1edge_security.c \
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +010020 ${RDN1EDGE_BASE}/rdn1edge_err.c \
Vijayenthiran Subramaniam22141b62018-10-25 22:20:24 +053021 drivers/arm/tzc/tzc_dmc620.c \
22 lib/utils/mem_region.c \
Chandni Cherukurif7813232018-09-16 21:06:29 +053023 plat/arm/common/arm_nor_psci_mem_protect.c
24
25BL31_SOURCES += ${SGI_CPU_SOURCES} \
Chandni Cherukuri15ec1e52019-02-22 13:41:03 +053026 ${RDN1EDGE_BASE}/rdn1edge_plat.c \
Vijayenthiran Subramaniamf5cb00f2019-12-27 19:27:57 +053027 ${RDN1EDGE_BASE}/rdn1edge_topology.c \
Chandni Cherukurif7813232018-09-16 21:06:29 +053028 drivers/cfi/v2m/v2m_flash.c \
Vijayenthiran Subramaniamc4e68a42019-10-28 14:49:48 +053029 drivers/arm/gic/v3/gic600_multichip.c \
Chandni Cherukurif7813232018-09-16 21:06:29 +053030 lib/utils/mem_region.c \
31 plat/arm/common/arm_nor_psci_mem_protect.c
32
Max Shvetsov06dba292019-12-06 11:50:12 +000033ifeq (${TRUSTED_BOARD_BOOT}, 1)
34BL1_SOURCES += ${RDN1EDGE_BASE}/rdn1edge_trusted_boot.c
35BL2_SOURCES += ${RDN1EDGE_BASE}/rdn1edge_trusted_boot.c
36endif
37
Vijayenthiran Subramaniamc4e68a42019-10-28 14:49:48 +053038# Enable dynamic addition of MMAP regions in BL31
39BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
40
Chandni Cherukurif7813232018-09-16 21:06:29 +053041# Add the FDT_SOURCES and options for Dynamic Config
Louis Mayencourt9fdfae32020-02-12 09:26:09 +000042FDT_SOURCES += ${RDN1EDGE_BASE}/fdts/${PLAT}_fw_config.dts
43TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
Chandni Cherukurif7813232018-09-16 21:06:29 +053044
45# Add the TB_FW_CONFIG to FIP and specify the same to certtool
46$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config))
47
Chandni Cherukuri15ec1e52019-02-22 13:41:03 +053048FDT_SOURCES += ${RDN1EDGE_BASE}/fdts/${PLAT}_nt_fw_config.dts
Chandni Cherukuri29ea98d2018-11-28 11:26:19 +053049NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
Chandni Cherukurif7813232018-09-16 21:06:29 +053050
Chandni Cherukuri29ea98d2018-11-28 11:26:19 +053051# Add the NT_FW_CONFIG to FIP and specify the same to certtool
52$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config))
Chandni Cherukurif7813232018-09-16 21:06:29 +053053
Vijayenthiran Subramaniamcfa3aea2020-02-12 13:26:33 +053054$(eval $(call CREATE_SEQ,SEQ,2))
55ifneq ($(CSS_SGI_CHIP_COUNT),$(filter $(CSS_SGI_CHIP_COUNT),$(SEQ)))
56 $(error "Chip count for RDN1Edge platform should be one of $(SEQ), currently \
Vijayenthiran Subramaniamc4e68a42019-10-28 14:49:48 +053057 set to ${CSS_SGI_CHIP_COUNT}.")
Vijayenthiran Subramaniambc489912019-12-26 17:45:58 +053058endif
59
Chandni Cherukurif7813232018-09-16 21:06:29 +053060override CTX_INCLUDE_AARCH32_REGS := 0