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Dan Handley9df48042015-03-19 18:58:55 +00001#
Masahiro Yamadacd7711d2018-01-26 11:42:01 +09002# Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003#
dp-armfa3cf0b2017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Dan Handley9df48042015-03-19 18:58:55 +00005#
6
Soby Mathew0d268dc2016-07-11 14:13:56 +01007ifeq (${ARCH}, aarch64)
8 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted
9 # DRAM (if available) or the TZC secured area of DRAM.
Dimitris Papastamos8a418592018-01-02 10:25:50 +000010 # TZC secured DRAM is the default.
Dan Handley9df48042015-03-19 18:58:55 +000011
Dimitris Papastamos8a418592018-01-02 10:25:50 +000012 ARM_TSP_RAM_LOCATION ?= dram
Qixiang Xuc7b12c52017-10-13 09:04:12 +080013
Soby Mathew0d268dc2016-07-11 14:13:56 +010014 ifeq (${ARM_TSP_RAM_LOCATION}, tsram)
15 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
16 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram)
17 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID
18 else ifeq (${ARM_TSP_RAM_LOCATION}, dram)
19 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID
20 else
21 $(error "Unsupported ARM_TSP_RAM_LOCATION value")
22 endif
Dan Handley9df48042015-03-19 18:58:55 +000023
Soby Mathew0d268dc2016-07-11 14:13:56 +010024 # Process flags
Soby Mathew0d268dc2016-07-11 14:13:56 +010025 # Process ARM_BL31_IN_DRAM flag
26 ARM_BL31_IN_DRAM := 0
27 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
28 $(eval $(call add_define,ARM_BL31_IN_DRAM))
Roberto Vargasac6dc352017-10-20 10:46:23 +010029else
30 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
Soby Mathew0d268dc2016-07-11 14:13:56 +010031endif
Dan Handley9df48042015-03-19 18:58:55 +000032
Roberto Vargasac6dc352017-10-20 10:46:23 +010033$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID))
34
35
Soby Mathew7799cf72015-04-16 14:49:09 +010036# For the original power-state parameter format, the State-ID can be encoded
37# according to the recommended encoding or zero. This flag determines which
38# State-ID encoding to be parsed.
39ARM_RECOM_STATE_ID_ENC := 0
40
Douglas Raillard66933ff2016-11-07 17:29:34 +000041# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to
42# be set. Else throw a build error.
Soby Mathew7799cf72015-04-16 14:49:09 +010043ifeq (${PSCI_EXTENDED_STATE_ID}, 1)
44 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
Douglas Raillard66933ff2016-11-07 17:29:34 +000045 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
46 PSCI_EXTENDED_STATE_ID is set for ARM platforms)
Soby Mathew7799cf72015-04-16 14:49:09 +010047 endif
48endif
49
50# Process ARM_RECOM_STATE_ID_ENC flag
51$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
52$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))
53
Juan Castillob6132f12015-10-06 14:01:35 +010054# Process ARM_DISABLE_TRUSTED_WDOG flag
55# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set
56ARM_DISABLE_TRUSTED_WDOG := 0
57ifeq (${SPIN_ON_BL1_EXIT}, 1)
58ARM_DISABLE_TRUSTED_WDOG := 1
59endif
60$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
61$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))
62
Juan Castilloaadf19a2015-11-06 16:02:32 +000063# Process ARM_CONFIG_CNTACR
64ARM_CONFIG_CNTACR := 1
65$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
66$(eval $(call add_define,ARM_CONFIG_CNTACR))
67
David Wang0ba499f2016-03-07 11:02:57 +080068# Process ARM_BL31_IN_DRAM flag
69ARM_BL31_IN_DRAM := 0
70$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
71$(eval $(call add_define,ARM_BL31_IN_DRAM))
72
Summer Qin93c812f2017-02-28 16:46:17 +000073# Process ARM_PLAT_MT flag
74ARM_PLAT_MT := 0
75$(eval $(call assert_boolean,ARM_PLAT_MT))
76$(eval $(call add_define,ARM_PLAT_MT))
77
Antonio Nino Diazf09d0032017-04-11 14:04:56 +010078# Use translation tables library v2 by default
79ARM_XLAT_TABLES_LIB_V1 := 0
80$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
81$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
82
Antonio Nino Diaz01b6cb92017-05-24 14:11:07 +010083# Use an implementation of SHA-256 with a smaller memory footprint but reduced
84# speed.
85$(eval $(call add_define,MBEDTLS_SHA256_SMALLER))
86
Summer Qin80726782017-04-20 16:28:39 +010087# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
88# in the FIP if the platform requires.
89ifneq ($(BL32_EXTRA1),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +090090$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
Summer Qin80726782017-04-20 16:28:39 +010091endif
92ifneq ($(BL32_EXTRA2),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +090093$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
Summer Qin80726782017-04-20 16:28:39 +010094endif
95
Soby Mathew421dbc42016-05-23 16:07:53 +010096# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
Soby Mathew0d268dc2016-07-11 14:13:56 +010097ENABLE_PSCI_STAT := 1
dp-arm66abfbe2017-01-31 13:01:04 +000098ENABLE_PMF := 1
Soby Mathew421dbc42016-05-23 16:07:53 +010099
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +0100100# On ARM platforms, separate the code and read-only data sections to allow
101# mapping the former as executable and the latter as execute-never.
102SEPARATE_CODE_AND_RODATA := 1
103
Yatharth Kochar8c0177f2016-11-11 13:57:50 +0000104# Enable new version of image loading on ARM platforms
105LOAD_IMAGE_V2 := 1
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +0100106
Masahiro Yamadad1f97752017-05-23 19:41:36 +0900107# Use generic OID definition (tbbr_oid.h)
108USE_TBBR_DEFS := 1
109
Soby Mathew7e4d6652017-05-10 11:50:30 +0100110# Disable ARM Cryptocell by default
111ARM_CRYPTOCELL_INTEG := 0
112$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG))
113$(eval $(call add_define,ARM_CRYPTOCELL_INTEG))
114
Juan Castillo9b265a82015-05-07 14:52:44 +0100115PLAT_INCLUDES += -Iinclude/common/tbbr \
Soby Mathew0d268dc2016-07-11 14:13:56 +0100116 -Iinclude/plat/arm/common
Dan Handley9df48042015-03-19 18:58:55 +0000117
Soby Mathew0d268dc2016-07-11 14:13:56 +0100118ifeq (${ARCH}, aarch64)
119PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64
120endif
Dan Handley9df48042015-03-19 18:58:55 +0000121
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100122PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \
123 plat/arm/common/arm_common.c
124
125ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
126PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \
127 lib/xlat_tables/${ARCH}/xlat_tables.c
128else
Antonio Nino Diaz719bf852017-02-23 17:22:58 +0000129include lib/xlat_tables_v2/xlat_tables.mk
130
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100131PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
132endif
Dan Handley9df48042015-03-19 18:58:55 +0000133
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000134BL1_SOURCES += drivers/arm/sp805/sp805.c \
Dan Handley9df48042015-03-19 18:58:55 +0000135 drivers/io/io_fip.c \
136 drivers/io/io_memmap.c \
137 drivers/io/io_storage.c \
138 plat/arm/common/arm_bl1_setup.c \
dp-arm230011c2017-03-07 11:02:47 +0000139 plat/arm/common/arm_io_storage.c
Sandrine Bailleux03897bb2015-11-26 16:31:34 +0000140ifdef EL3_PAYLOAD_BASE
141# Need the arm_program_trusted_mailbox() function to release secondary CPUs from
142# their holding pen
143BL1_SOURCES += plat/arm/common/arm_pm.c
144endif
Dan Handley9df48042015-03-19 18:58:55 +0000145
Soby Mathew1ced6b82017-06-12 12:37:10 +0100146BL2_SOURCES += drivers/delay_timer/delay_timer.c \
147 drivers/delay_timer/generic_delay_timer.c \
148 drivers/io/io_fip.c \
Dan Handley9df48042015-03-19 18:58:55 +0000149 drivers/io/io_memmap.c \
150 drivers/io/io_storage.c \
151 plat/arm/common/arm_bl2_setup.c \
dp-arm230011c2017-03-07 11:02:47 +0000152 plat/arm/common/arm_io_storage.c
Roberto Vargas52207802017-11-17 13:22:18 +0000153
154ifeq (${BL2_AT_EL3},1)
155BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c
156endif
157
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100158ifeq (${LOAD_IMAGE_V2},1)
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000159# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
160# the AArch32 descriptors.
161ifeq (${JUNO_AARCH32_EL3_RUNTIME},1)
162BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
163else
164BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
165endif
166BL2_SOURCES += plat/arm/common/arm_image_load.c \
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100167 common/desc_image_load.c
Summer Qin9db8f2e2017-04-24 16:49:28 +0100168ifeq (${SPD},opteed)
169BL2_SOURCES += lib/optee/optee_utils.c
170endif
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100171endif
Dan Handley9df48042015-03-19 18:58:55 +0000172
Soby Mathew1ced6b82017-06-12 12:37:10 +0100173BL2U_SOURCES += drivers/delay_timer/delay_timer.c \
174 drivers/delay_timer/generic_delay_timer.c \
175 plat/arm/common/arm_bl2u_setup.c
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100176
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000177BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \
Dan Handley9df48042015-03-19 18:58:55 +0000178 plat/arm/common/arm_pm.c \
Dan Handley9df48042015-03-19 18:58:55 +0000179 plat/arm/common/arm_topology.c \
Jeenu Viswambharanbc1a9292017-02-16 14:55:15 +0000180 plat/arm/common/execution_state_switch.c \
Soby Mathewf6c41082016-05-03 12:31:18 +0100181 plat/common/plat_psci_common.c
Juan Castilloa08a5e72015-05-19 11:54:12 +0100182
dp-arm1cebefd2016-09-19 11:21:03 +0100183ifeq (${ENABLE_PMF}, 1)
184BL31_SOURCES += plat/arm/common/arm_sip_svc.c \
185 lib/pmf/pmf_smc.c
186endif
187
Jeenu Viswambharanb1837452017-10-24 11:47:13 +0100188ifeq (${EL3_EXCEPTION_HANDLING},1)
189BL31_SOURCES += plat/arm/common/aarch64/arm_ehf.c
190endif
191
Jeenu Viswambharana5acc0a2017-09-22 08:32:10 +0100192ifeq (${SDEI_SUPPORT},1)
193BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c
194endif
195
Juan Castilloa08a5e72015-05-19 11:54:12 +0100196ifneq (${TRUSTED_BOARD_BOOT},0)
197
Juan Castilloa08a5e72015-05-19 11:54:12 +0100198 # Include common TBB sources
199 AUTH_SOURCES := drivers/auth/auth_mod.c \
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000200 drivers/auth/crypto_mod.c \
201 drivers/auth/img_parser_mod.c \
202 drivers/auth/tbbr/tbbr_cot.c \
Juan Castilloa08a5e72015-05-19 11:54:12 +0100203
Yatharth Kochar736a3bf2015-10-11 14:14:55 +0100204 PLAT_INCLUDES += -Iinclude/bl1/tbbr
205
Yatharth Kocharf11b29a2016-02-01 11:04:46 +0000206 BL1_SOURCES += ${AUTH_SOURCES} \
207 bl1/tbbr/tbbr_img_desc.c \
dp-armb3e85802016-12-12 14:48:13 +0000208 plat/arm/common/arm_bl1_fwu.c \
209 plat/common/tbbr/plat_tbbr.c
Yatharth Kochar736a3bf2015-10-11 14:14:55 +0100210
dp-armb3e85802016-12-12 14:48:13 +0000211 BL2_SOURCES += ${AUTH_SOURCES} \
212 plat/common/tbbr/plat_tbbr.c
Juan Castilloa08a5e72015-05-19 11:54:12 +0100213
Masahiro Yamada9c5ca522018-01-26 11:42:01 +0900214 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_))
Yatharth Kochard1a93432015-10-12 12:33:47 +0100215
Juan Castilloa08a5e72015-05-19 11:54:12 +0100216 # We expect to locate the *.mk files under the directories specified below
Soby Mathew7e4d6652017-05-10 11:50:30 +0100217ifeq (${ARM_CRYPTOCELL_INTEG},0)
Juan Castilloa08a5e72015-05-19 11:54:12 +0100218 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
Soby Mathew7e4d6652017-05-10 11:50:30 +0100219else
220 CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk
221endif
Juan Castilloa08a5e72015-05-19 11:54:12 +0100222 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
223
224 $(info Including ${CRYPTO_LIB_MK})
225 include ${CRYPTO_LIB_MK}
226
227 $(info Including ${IMG_PARSER_LIB_MK})
228 include ${IMG_PARSER_LIB_MK}
229
230endif