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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <string.h>
32#include <assert.h>
33#include <platform.h>
34#include <fvp_pwrc.h>
35/* TODO: Reusing psci error codes & state information. Get our own! */
36#include <psci.h>
37
38/* We treat '255' as an invalid affinity instance */
39#define AFFINST_INVAL 0xff
40
41/*******************************************************************************
42 * We support 3 flavours of the FVP: Foundation, Base AEM & Base Cortex. Each
43 * flavour has a different topology. The common bit is that there can be a max.
44 * of 2 clusters (affinity 1) and 4 cpus (affinity 0) per cluster. So we define
45 * a tree like data structure which caters to these maximum bounds. It simply
46 * marks the absent affinity level instances as PSCI_AFF_ABSENT e.g. there is no
47 * cluster 1 on the Foundation FVP. The 'data' field is currently unused.
48 ******************************************************************************/
49typedef struct {
50 unsigned char sibling;
51 unsigned char child;
52 unsigned char state;
53 unsigned int data;
54} affinity_info;
55
56/*******************************************************************************
57 * The following two data structures store the topology tree for the fvp. There
58 * is a separate array for each affinity level i.e. cpus and clusters. The child
59 * and sibling references allow traversal inside and in between the two arrays.
60 ******************************************************************************/
61static affinity_info fvp_aff1_topology_map[PLATFORM_CLUSTER_COUNT];
62static affinity_info fvp_aff0_topology_map[PLATFORM_CORE_COUNT];
63
64/* Simple global variable to safeguard us from stupidity */
65static unsigned int topology_setup_done;
66
67/*******************************************************************************
68 * This function implements a part of the critical interface between the psci
69 * generic layer and the platform to allow the former to detect the platform
70 * topology. psci queries the platform to determine how many affinity instances
71 * are present at a particular level for a given mpidr e.g. consider a dual
72 * cluster platform where each cluster has 4 cpus. A call to this function with
73 * (0, 0x100) will return the number of cpus implemented under cluster 1 i.e. 4.
74 * Similarly a call with (1, 0x100) will return 2 i.e. the number of clusters.
75 * This is 'cause we are effectively asking how many affinity level 1 instances
76 * are implemented under affinity level 2 instance 0.
77 ******************************************************************************/
78unsigned int plat_get_aff_count(unsigned int aff_lvl,
79 unsigned long mpidr)
80{
81 unsigned int aff_count = 1, ctr;
82 unsigned char parent_aff_id;
83
84 assert(topology_setup_done == 1);
85
86 switch (aff_lvl) {
87 case 3:
88 case 2:
89 /*
90 * Assert if the parent affinity instance is not 0.
91 * This also takes care of level 3 in an obfuscated way
92 */
93 parent_aff_id = (mpidr >> MPIDR_AFF3_SHIFT) & MPIDR_AFFLVL_MASK;
94 assert(parent_aff_id == 0);
95
96 /*
97 * Report that we implement a single instance of
98 * affinity levels 2 & 3 which are AFF_ABSENT
99 */
100 break;
101 case 1:
102 /* Assert if the parent affinity instance is not 0. */
103 parent_aff_id = (mpidr >> MPIDR_AFF2_SHIFT) & MPIDR_AFFLVL_MASK;
104 assert(parent_aff_id == 0);
105
106 /* Fetch the starting index in the aff1 array */
107 for (ctr = 0;
108 fvp_aff1_topology_map[ctr].sibling != AFFINST_INVAL;
109 ctr = fvp_aff1_topology_map[ctr].sibling) {
110 aff_count++;
111 }
112
113 break;
114 case 0:
115 /* Assert if the cluster id is anything apart from 0 or 1 */
116 parent_aff_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK;
117 assert(parent_aff_id < PLATFORM_CLUSTER_COUNT);
118
119 /* Fetch the starting index in the aff0 array */
120 for (ctr = fvp_aff1_topology_map[parent_aff_id].child;
121 fvp_aff0_topology_map[ctr].sibling != AFFINST_INVAL;
122 ctr = fvp_aff0_topology_map[ctr].sibling) {
123 aff_count++;
124 }
125
126 break;
127 default:
128 assert(0);
129 }
130
131 return aff_count;
132}
133
134/*******************************************************************************
135 * This function implements a part of the critical interface between the psci
136 * generic layer and the platform to allow the former to detect the state of a
137 * affinity instance in the platform topology. psci queries the platform to
138 * determine whether an affinity instance is present or absent. This caters for
139 * topologies where an intermediate affinity level instance is missing e.g.
140 * consider a platform which implements a single cluster with 4 cpus and there
141 * is another cpu sitting directly on the interconnect along with the cluster.
142 * The mpidrs of the cluster would range from 0x0-0x3. The mpidr of the single
143 * cpu would be 0x100 to highlight that it does not belong to cluster 0. Cluster
144 * 1 is however missing but needs to be accounted to reach this single cpu in
145 * the topology tree. Hence it will be marked as PSCI_AFF_ABSENT. This is not
146 * applicable to the FVP but depicted as an example.
147 ******************************************************************************/
148unsigned int plat_get_aff_state(unsigned int aff_lvl,
149 unsigned long mpidr)
150{
151 unsigned int aff_state = PSCI_AFF_ABSENT, idx;
152 idx = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK;
153
154 assert(topology_setup_done == 1);
155
156 switch (aff_lvl) {
157 case 3:
158 case 2:
159 /* Report affinity levels 2 & 3 as absent */
160 break;
161 case 1:
162 aff_state = fvp_aff1_topology_map[idx].state;
163 break;
164 case 0:
165 /*
166 * First get start index of the aff0 in its array & then add
167 * to it the affinity id that we want the state of
168 */
169 idx = fvp_aff1_topology_map[idx].child;
170 idx += (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK;
171 aff_state = fvp_aff0_topology_map[idx].state;
172 break;
173 default:
174 assert(0);
175 }
176
177 return aff_state;
178}
179
180/*******************************************************************************
181 * Handy optimization to prevent the psci implementation from traversing through
182 * affinity levels which are not present while detecting the platform topology.
183 ******************************************************************************/
184int plat_get_max_afflvl()
185{
186 return MPIDR_AFFLVL1;
187}
188
189/*******************************************************************************
190 * This function populates the FVP specific topology information depending upon
191 * the FVP flavour its running on. We construct all the mpidrs we can handle
192 * and rely on the PWRC.PSYSR to flag absent cpus when their status is queried.
193 ******************************************************************************/
194int plat_setup_topology()
195{
196 unsigned char aff0, aff1, aff_state, aff0_offset = 0;
197 unsigned long mpidr;
198
199 topology_setup_done = 0;
200
201 for (aff1 = 0; aff1 < PLATFORM_CLUSTER_COUNT; aff1++) {
202
203 fvp_aff1_topology_map[aff1].child = aff0_offset;
204 fvp_aff1_topology_map[aff1].sibling = aff1 + 1;
205
206 for (aff0 = 0; aff0 < PLATFORM_MAX_CPUS_PER_CLUSTER; aff0++) {
207
208 mpidr = aff1 << MPIDR_AFF1_SHIFT;
209 mpidr |= aff0 << MPIDR_AFF0_SHIFT;
210
211 if (fvp_pwrc_read_psysr(mpidr) != PSYSR_INVALID) {
212 /*
213 * Presence of even a single aff0 indicates
214 * presence of parent aff1 on the FVP.
215 */
216 aff_state = PSCI_AFF_PRESENT;
217 fvp_aff1_topology_map[aff1].state =
218 PSCI_AFF_PRESENT;
219 } else {
220 aff_state = PSCI_AFF_ABSENT;
221 }
222
223 fvp_aff0_topology_map[aff0_offset].child = AFFINST_INVAL;
224 fvp_aff0_topology_map[aff0_offset].state = aff_state;
225 fvp_aff0_topology_map[aff0_offset].sibling =
226 aff0_offset + 1;
227
228 /* Increment the absolute number of aff0s traversed */
229 aff0_offset++;
230 }
231
232 /* Tie-off the last aff0 sibling to -1 to avoid overflow */
233 fvp_aff0_topology_map[aff0_offset - 1].sibling = AFFINST_INVAL;
234 }
235
236 /* Tie-off the last aff1 sibling to AFFINST_INVAL to avoid overflow */
237 fvp_aff1_topology_map[aff1 - 1].sibling = AFFINST_INVAL;
238
239 topology_setup_done = 1;
240 return 0;
241}