Soby Mathew | fec4eb7 | 2015-07-01 16:16:20 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #include <plat_arm.h> |
| 32 | |
| 33 | /* |
Soby Mathew | a869de1 | 2015-05-08 10:18:59 +0100 | [diff] [blame] | 34 | * On ARM CSS platforms, by default, the system power level is treated as the |
Soby Mathew | fec4eb7 | 2015-07-01 16:16:20 +0100 | [diff] [blame] | 35 | * highest. The first entry in the power domain descriptor specifies the |
Soby Mathew | a869de1 | 2015-05-08 10:18:59 +0100 | [diff] [blame] | 36 | * number of system power domains i.e. 1. |
Soby Mathew | fec4eb7 | 2015-07-01 16:16:20 +0100 | [diff] [blame] | 37 | */ |
Soby Mathew | a869de1 | 2015-05-08 10:18:59 +0100 | [diff] [blame] | 38 | #define CSS_PWR_DOMAINS_AT_MAX_PWR_LVL ARM_SYSTEM_COUNT |
Soby Mathew | fec4eb7 | 2015-07-01 16:16:20 +0100 | [diff] [blame] | 39 | |
| 40 | /* |
Soby Mathew | a869de1 | 2015-05-08 10:18:59 +0100 | [diff] [blame] | 41 | * The CSS power domain tree descriptor for dual cluster CSS platforms. |
| 42 | * The cluster power domains are arranged so that when the PSCI generic |
| 43 | * code creates the power domain tree, the indices of the CPU power |
| 44 | * domain nodes it allocates match the linear indices returned by |
| 45 | * plat_core_pos_by_mpidr() i.e. CLUSTER1 CPUs are allocated indices |
| 46 | * from 0 to 3 and the higher indices for CLUSTER0 CPUs. |
Soby Mathew | fec4eb7 | 2015-07-01 16:16:20 +0100 | [diff] [blame] | 47 | */ |
| 48 | const unsigned char arm_power_domain_tree_desc[] = { |
| 49 | /* No of root nodes */ |
| 50 | CSS_PWR_DOMAINS_AT_MAX_PWR_LVL, |
Soby Mathew | a869de1 | 2015-05-08 10:18:59 +0100 | [diff] [blame] | 51 | /* No of children for the root node */ |
| 52 | ARM_CLUSTER_COUNT, |
| 53 | /* No of children for the first cluster node */ |
Soby Mathew | fec4eb7 | 2015-07-01 16:16:20 +0100 | [diff] [blame] | 54 | PLAT_ARM_CLUSTER1_CORE_COUNT, |
Soby Mathew | a869de1 | 2015-05-08 10:18:59 +0100 | [diff] [blame] | 55 | /* No of children for the second cluster node */ |
Soby Mathew | fec4eb7 | 2015-07-01 16:16:20 +0100 | [diff] [blame] | 56 | PLAT_ARM_CLUSTER0_CORE_COUNT |
| 57 | }; |
| 58 | |
| 59 | |
| 60 | /****************************************************************************** |
| 61 | * This function implements a part of the critical interface between the psci |
| 62 | * generic layer and the platform that allows the former to query the platform |
| 63 | * to convert an MPIDR to a unique linear index. An error code (-1) is |
| 64 | * returned in case the MPIDR is invalid. |
| 65 | *****************************************************************************/ |
| 66 | int plat_core_pos_by_mpidr(u_register_t mpidr) |
| 67 | { |
| 68 | if (arm_check_mpidr(mpidr) == 0) |
| 69 | return plat_arm_calc_core_pos(mpidr); |
| 70 | |
| 71 | return -1; |
| 72 | } |