| Soby Mathew | 49473e4 | 2015-06-10 13:49:59 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
| Soby Mathew | 49473e4 | 2015-06-10 13:49:59 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <asm_macros.S> |
| 9 | #include <assert_macros.S> |
| 10 | #include <platform_def.h> |
| 11 | |
| 12 | .globl plat_my_core_pos |
| 13 | .globl plat_is_my_cpu_primary |
| 14 | .globl plat_get_my_entrypoint |
| 15 | .weak platform_get_core_pos |
| 16 | |
| 17 | /* ----------------------------------------------------- |
| 18 | * Compatibility wrappers for new platform APIs. |
| 19 | * ----------------------------------------------------- |
| 20 | */ |
| 21 | func plat_my_core_pos |
| 22 | mrs x0, mpidr_el1 |
| 23 | b platform_get_core_pos |
| 24 | endfunc plat_my_core_pos |
| 25 | |
| 26 | func plat_is_my_cpu_primary |
| 27 | mrs x0, mpidr_el1 |
| 28 | b platform_is_primary_cpu |
| 29 | endfunc plat_is_my_cpu_primary |
| 30 | |
| 31 | func plat_get_my_entrypoint |
| 32 | mrs x0, mpidr_el1 |
| 33 | b platform_get_entrypoint |
| 34 | endfunc plat_get_my_entrypoint |
| 35 | |
| 36 | /* ----------------------------------------------------- |
| 37 | * int platform_get_core_pos(int mpidr); |
| 38 | * With this function: CorePos = (ClusterId * 4) + |
| 39 | * CoreId |
| 40 | * ----------------------------------------------------- |
| 41 | */ |
| 42 | func platform_get_core_pos |
| 43 | and x1, x0, #MPIDR_CPU_MASK |
| 44 | and x0, x0, #MPIDR_CLUSTER_MASK |
| 45 | add x0, x1, x0, LSR #6 |
| 46 | ret |
| 47 | endfunc platform_get_core_pos |