| Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <bl_common.h> |
| 8 | #include <desc_image_load.h> |
| 9 | #include <platform.h> |
| 10 | #include <platform_def.h> |
| 11 | |
| 12 | /******************************************************************************* |
| 13 | * Following descriptor provides BL image/ep information that gets used |
| 14 | * by BL2 to load the images and also subset of this information is |
| 15 | * passed to next BL image. The image loading sequence is managed by |
| 16 | * populating the images in required loading order. The image execution |
| 17 | * sequence is managed by populating the `next_handoff_image_id` with |
| 18 | * the next executable image id. |
| 19 | ******************************************************************************/ |
| 20 | static bl_mem_params_node_t bl2_mem_params_descs[] = { |
| 21 | /* Fill BL32 related information */ |
| 22 | { |
| 23 | .image_id = BL32_IMAGE_ID, |
| 24 | |
| 25 | SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, |
| 26 | VERSION_2, entry_point_info_t, |
| 27 | SECURE | EXECUTABLE | EP_FIRST_EXE), |
| 28 | |
| 29 | .ep_info.pc = BL32_BASE, |
| 30 | .ep_info.spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, |
| 31 | SPSR_E_LITTLE, |
| 32 | DISABLE_ALL_EXCEPTIONS), |
| 33 | |
| 34 | SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, |
| 35 | VERSION_2, image_info_t, |
| 36 | IMAGE_ATTRIB_PLAT_SETUP), |
| 37 | |
| 38 | .image_info.image_base = BL32_BASE, |
| 39 | .image_info.image_max_size = BL32_LIMIT - BL32_BASE, |
| 40 | |
| 41 | .next_handoff_image_id = BL33_IMAGE_ID, |
| 42 | }, |
| 43 | |
| 44 | /* Fill BL33 related information */ |
| 45 | { |
| 46 | .image_id = BL33_IMAGE_ID, |
| 47 | |
| 48 | SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, |
| 49 | VERSION_2, entry_point_info_t, |
| 50 | NON_SECURE | EXECUTABLE), |
| 51 | |
| 52 | .ep_info.pc = PLAT_STM32MP1_NS_IMAGE_OFFSET, |
| 53 | .ep_info.spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, |
| 54 | SPSR_E_LITTLE, |
| 55 | DISABLE_ALL_EXCEPTIONS), |
| 56 | |
| 57 | SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, |
| 58 | VERSION_2, image_info_t, 0), |
| 59 | |
| 60 | .image_info.image_base = PLAT_STM32MP1_NS_IMAGE_OFFSET, |
| 61 | .image_info.image_max_size = STM32MP1_DDR_MAX_SIZE - |
| 62 | (PLAT_STM32MP1_NS_IMAGE_OFFSET - STM32MP1_DDR_BASE), |
| 63 | |
| 64 | .next_handoff_image_id = INVALID_IMAGE_ID, |
| 65 | } |
| 66 | }; |
| 67 | |
| 68 | REGISTER_BL_IMAGE_DESCS(bl2_mem_params_descs) |