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git01.mediatek.com / filogic / atf / 4abb74d6e0adf6ad1daedd775fda15963be9ab47 / . / plat / arm / board / rdn2 / fdts / rdn2_stmm_sel0_manifest.dts
blob: 61197067282df559e868023b1b6f341760520963 [file] [log] [blame]
Sayanta Pattanayak2a10dc82021-11-17 20:08:19 +0530[diff] [blame]1/*
2 * Copyright (c) 2023, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7/dts-v1/;
8
9#include <platform_def.h>
10
11/ {
12#define MODE_SEL0 (0x1)
13
14#define SECURE_RO 0x1
15#define SECURE_RW 0x3
16#define SECURE_EXECUTE_RO 0x5
17#define SECURE_EXECUTE_RW 0x7
18#define NON_SECURE_RO 0x9
19#define NON_SECURE_RW 0xB
20#define NON_SECURE_EXECUTE_RO 0xD
21#define NON_SECURE_EXECUTE_RW 0xF
22 /*
23 * FF-A compatible Secure Partition Manager parses the
24 * manifest file and fetch the following booting arguments to
25 * pass on to the StandAloneMM(StMM) Secure Partition.
26 */
27 compatible = "arm,ffa-manifest-1.0";
28
29 description = "RDN2 StMM";
30 ffa-version = <0x00010001>; /* 31:16 - Major, 15:0 - Minor */
31 uuid = <0x378daedc 0xf06b4446 0x831440ab 0x933c87a3>;
32 id = <0x8001>;
33 execution-ctx-count = <1>;
34 exception-level = <MODE_SEL0>; /* S-EL0 */
35 execution-state = <0>; /* AArch64 */
36 load-address = <0x0 0xFF200000>;
37 image-size = <0x0 0x280000>;
38 xlat-granule = <0>; /* 4KiB */
39 boot-order = <0>;
40 messaging-method = <0x3>; /* Direct request/response supported. */
Nishant Sharma85ad1302023-11-30 11:28:54 +0000[diff] [blame]41 power-management-messages = <0>;
Sayanta Pattanayak2a10dc82021-11-17 20:08:19 +0530[diff] [blame]42 gp-register-num = <0>;
43
44 device-regions {
45 compatible = "arm,ffa-manifest-device-regions";
46
47 /*
48 * System registers region for access from S-EL0.
49 * Similar to PLAT_ARM_SECURE_MAP_SYSTEMREG.
50 */
51 sys-regs {
52 base-address = <0x0 0x0C010000>;
53 pages-count = <0x10>;
54 attributes = <SECURE_RW>;
55 };
56
57 rtc {
58 base-address = <0x0 0x0C170000>;
59 pages-count = <0x1>;
60 attributes = <SECURE_RW>;
61 };
62
63 /*
64 * ARM CSS SoC Expansion Peripherals.
65 */
66 soc_components {
67 base-address = <0x0 0x0E000000>;
68 pages-count = <0x2000>;
69 attributes = <SECURE_RW>;
70 };
71
72 cluster_utility {
73 base-address = <0x0 0x20000000>;
74 pages-count = <0x20000>;
75 attributes = <SECURE_RW>;
76 };
77
78 secure_uart {
79 base-address = <0x0 0x2A410000>;
80 pages-count = <0x10>;
81 attributes = <SECURE_RW>;
82 };
83
84 /*
85 * Used for Secure booting.
86 */
87 nor_flash2 {
88 base-address = <0x10 0x54000000>;
89 pages-count = <0x4000>;
90 attributes = <SECURE_RW>;
91 };
92 };
93
94 memory-regions {
95 compatible = "arm,ffa-manifest-memory-regions";
96
97 /*
98 * SPM Payload memory. Mapped as code region for S-EL0
99 * Similar to ARM_SP_IMAGE_MMAP macro used for defining base of
100 * the SP image.
101 */
102 stmm_region {
103 base-address = <0x0 0xff200000>;
104 pages-count = <0x300>;
105 /* StMM will remap the regions during runtime. */
106 attributes = <SECURE_EXECUTE_RO>;
107 };
108
109 /*
110 * Memory shared between EL3 SPMC and S-EL0.
111 */
112 rx-tx-buffers {
113 description = "shared-buff";
114 base-address = <0x0 0xff500000>;
115 pages-count = <0x100>;
116 attributes = <SECURE_RW>;
117 };
118
119 /*
120 * Memory shared between Normal world and S-EL0.
121 */
122 ns_comm_buffer {
123 /*
124 * Description is needed for StMM to identify
125 * ns-communication buffer.
126 */
127 description = "ns-comm";
128 base-address = <0x0 0xff600000>;
129 pages-count = <0x30>;
130 attributes = <NON_SECURE_RW>;
131 };
132
133 /*
134 * Heap used by SP to allocate memory for DMA.
135 */
136 heap {
137 /*
138 * Description is needed for StMM to identify
139 * heap buffer.
140 */
141 description = "heap";
142 base-address = <0x0 0xFF630000>;
143 pages-count = <0x5D0>;
144 attributes = <SECURE_RW>;
145 };
146 };
147};