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Manish V Badarkhe8a766032022-02-23 11:26:53 +00001/*
2 * Copyright (c) 2022 Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7#ifndef DRTM_MAIN_H
8#define DRTM_MAIN_H
9
10#include <stdint.h>
11
Manish Pandeyfef989c2022-06-21 15:36:45 +010012#include <assert.h>
Manish V Badarkhe8a766032022-02-23 11:26:53 +000013#include <lib/smccc.h>
14
Manish V Badarkhecc2c7432022-02-24 20:22:39 +000015#include "drtm_dma_prot.h"
16
Manish Pandeyfef989c2022-06-21 15:36:45 +010017#define ALIGNED_UP(x, a) __extension__ ({ \
18 __typeof__(a) _a = (a); \
19 __typeof__(a) _one = 1; \
20 assert(IS_POWER_OF_TWO(_a)); \
21 ((x) + (_a - _one)) & ~(_a - _one); \
22})
23
24#define ALIGNED_DOWN(x, a) __extension__ ({ \
25 __typeof__(a) _a = (a); \
26 __typeof__(a) _one = 1; \
27 assert(IS_POWER_OF_TWO(_a)); \
28 (x) & ~(_a - _one); \
29})
30
31#define DRTM_PAGE_SIZE (4 * (1 << 10))
32#define DRTM_PAGE_SIZE_STR "4-KiB"
33
Manish V Badarkhead035ce2022-06-21 18:08:50 +010034#define DL_ARGS_GET_DMA_PROT_TYPE(a) (((a)->features >> 3) & 0x7U)
Manish V Badarkhe19b22f92022-06-17 11:42:17 +010035#define DL_ARGS_GET_PCR_SCHEMA(a) (((a)->features >> 1) & 0x3U)
36#define DL_ARGS_GET_DLME_ENTRY_POINT(a) \
37 (((a)->dlme_paddr + (a)->dlme_img_off + (a)->dlme_img_ep_off))
38
Manish V Badarkhe24cb9202022-09-21 10:04:16 +010039/*
40 * Range(Min/Max) of DRTM parameter structure versions supported
41 */
42#define ARM_DRTM_PARAMS_MIN_VERSION U(1)
43#define ARM_DRTM_PARAMS_MAX_VERSION U(1)
44
Manish Pandeycabcad52022-06-23 10:43:31 +010045enum drtm_dlme_el {
46 DLME_AT_EL1 = MODE_EL1,
47 DLME_AT_EL2 = MODE_EL2
48};
49
Manish V Badarkhe8a766032022-02-23 11:26:53 +000050enum drtm_retc {
51 SUCCESS = SMC_OK,
52 NOT_SUPPORTED = SMC_UNK,
53 INVALID_PARAMETERS = -2,
54 DENIED = -3,
55 NOT_FOUND = -4,
56 INTERNAL_ERROR = -5,
57 MEM_PROTECT_INVALID = -6,
58};
59
johpow01baa3e6c2022-03-11 17:50:58 -060060typedef struct {
61 uint64_t tpm_features;
62 uint64_t minimum_memory_requirement;
63 uint64_t dma_prot_features;
64 uint64_t boot_pe_id;
65 uint64_t tcb_hash_features;
66} drtm_features_t;
67
Manish Pandeyfef989c2022-06-21 15:36:45 +010068struct __packed drtm_dl_args_v1 {
Manish V Badarkhea28563e2022-06-22 13:11:14 +010069 uint16_t version; /* Must be 1. */
Manish Pandeyfef989c2022-06-21 15:36:45 +010070 uint8_t __res[2];
71 uint32_t features;
72 uint64_t dlme_paddr;
73 uint64_t dlme_size;
74 uint64_t dlme_img_off;
75 uint64_t dlme_img_ep_off;
76 uint64_t dlme_img_size;
77 uint64_t dlme_data_off;
78 uint64_t dce_nwd_paddr;
79 uint64_t dce_nwd_size;
80 drtm_dl_dma_prot_args_v1_t dma_prot_args;
81} __aligned(__alignof(uint16_t /* First member's type, `uint16_t version' */));
82
Manish V Badarkhea28563e2022-06-22 13:11:14 +010083struct __packed dlme_data_header_v1 {
84 uint16_t version; /* Must be 1. */
85 uint16_t this_hdr_size;
86 uint8_t __res[4];
87 uint64_t dlme_data_size;
88 uint64_t dlme_prot_regions_size;
89 uint64_t dlme_addr_map_size;
90 uint64_t dlme_tpm_log_size;
91 uint64_t dlme_tcb_hashes_table_size;
92 uint64_t dlme_impdef_region_size;
93} __aligned(__alignof(uint16_t /* First member's type, `uint16_t version'. */));
94
95typedef struct dlme_data_header_v1 struct_dlme_data_header;
96
johpow01baa3e6c2022-03-11 17:50:58 -060097drtm_memory_region_descriptor_table_t *drtm_build_address_map(void);
98uint64_t drtm_get_address_map_size(void);
99
Manish Pandeyfef989c2022-06-21 15:36:45 +0100100/*
101 * Version-independent type. May be used to avoid excessive line of code
102 * changes when migrating to new struct versions.
103 */
104typedef struct drtm_dl_args_v1 struct_drtm_dl_args;
105
Manish V Badarkhe8a766032022-02-23 11:26:53 +0000106#endif /* DRTM_MAIN_H */