blob: cd93d2eef7a3e3ff29652e195be395f0eebeec94 [file] [log] [blame]
Yann Gautier4b0c72a2018-07-16 10:54:09 +02001/*
Yann Gautierf9d40d52019-01-17 14:41:46 +01002 * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
Yann Gautier4b0c72a2018-07-16 10:54:09 +02003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Yann Gautier4b0c72a2018-07-16 10:54:09 +02007#include <assert.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008
Yann Gautier4b0c72a2018-07-16 10:54:09 +02009#include <platform_def.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010
11#include <arch_helpers.h>
12#include <common/bl_common.h>
13#include <common/debug.h>
14#include <drivers/arm/gicv2.h>
Yann Gautier038bff22019-01-17 19:17:47 +010015#include <dt-bindings/clock/stm32mp1-clks.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000016#include <lib/mmio.h>
17#include <lib/xlat_tables/xlat_tables_v2.h>
18#include <plat/common/platform.h>
19
Yann Gautier4b0c72a2018-07-16 10:54:09 +020020#include <stm32mp1_private.h>
Yann Gautier4b0c72a2018-07-16 10:54:09 +020021
22#define MAP_SRAM MAP_REGION_FLAT(STM32MP1_SRAM_BASE, \
23 STM32MP1_SRAM_SIZE, \
24 MT_MEMORY | \
25 MT_RW | \
26 MT_SECURE | \
27 MT_EXECUTE_NEVER)
28
29#define MAP_DEVICE1 MAP_REGION_FLAT(STM32MP1_DEVICE1_BASE, \
30 STM32MP1_DEVICE1_SIZE, \
31 MT_DEVICE | \
32 MT_RW | \
33 MT_SECURE | \
34 MT_EXECUTE_NEVER)
35
36#define MAP_DEVICE2 MAP_REGION_FLAT(STM32MP1_DEVICE2_BASE, \
37 STM32MP1_DEVICE2_SIZE, \
38 MT_DEVICE | \
39 MT_RW | \
40 MT_SECURE | \
41 MT_EXECUTE_NEVER)
42
Yann Gautier9d135e42018-07-16 19:36:06 +020043#if defined(IMAGE_BL2)
Yann Gautier4b0c72a2018-07-16 10:54:09 +020044static const mmap_region_t stm32mp1_mmap[] = {
45 MAP_SRAM,
46 MAP_DEVICE1,
47 MAP_DEVICE2,
Yann Gautier4b0c72a2018-07-16 10:54:09 +020048 {0}
49};
Yann Gautier9d135e42018-07-16 19:36:06 +020050#endif
51#if defined(IMAGE_BL32)
52static const mmap_region_t stm32mp1_mmap[] = {
53 MAP_SRAM,
54 MAP_DEVICE1,
55 MAP_DEVICE2,
Yann Gautier9d135e42018-07-16 19:36:06 +020056 {0}
57};
58#endif
Yann Gautier4b0c72a2018-07-16 10:54:09 +020059
60void configure_mmu(void)
61{
62 mmap_add(stm32mp1_mmap);
63 init_xlat_tables();
64
Antonio Nino Diaz4bef6b02018-08-07 16:35:54 +010065 enable_mmu_svc_mon(0);
Yann Gautier4b0c72a2018-07-16 10:54:09 +020066}
67
68uintptr_t plat_get_ns_image_entrypoint(void)
69{
70 return BL33_BASE;
71}
72
73unsigned int plat_get_syscnt_freq2(void)
74{
75 return read_cntfrq_el0();
76}
77
78/* Functions to save and get boot context address given by ROM code */
79static uintptr_t boot_ctx_address;
80
81void stm32mp1_save_boot_ctx_address(uintptr_t address)
82{
83 boot_ctx_address = address;
84}
85
86uintptr_t stm32mp1_get_boot_ctx_address(void)
87{
88 return boot_ctx_address;
89}
Yann Gautier038bff22019-01-17 19:17:47 +010090
91uintptr_t stm32_get_gpio_bank_base(unsigned int bank)
92{
93 switch (bank) {
94 case GPIO_BANK_A ... GPIO_BANK_K:
95 return GPIOA_BASE + (bank * GPIO_BANK_OFFSET);
96 case GPIO_BANK_Z:
97 return GPIOZ_BASE;
98 default:
99 panic();
100 }
101}
102
103/* Return clock ID on success, negative value on error */
104unsigned long stm32_get_gpio_bank_clock(unsigned int bank)
105{
106 switch (bank) {
107 case GPIO_BANK_A ... GPIO_BANK_K:
108 return GPIOA + (bank - GPIO_BANK_A);
109 case GPIO_BANK_Z:
110 return GPIOZ;
111 default:
112 panic();
113 }
114}
115
116uint32_t stm32_get_gpio_bank_offset(unsigned int bank)
117{
118 if (bank == GPIO_BANK_Z) {
119 return 0;
120 } else {
121 return bank * GPIO_BANK_OFFSET;
122 }
123}