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Nariman Poushin0ece80f2018-02-26 06:52:04 +00001#
Paul Beesleydb4e25a2019-10-14 15:27:12 +00002# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
Nariman Poushin0ece80f2018-02-26 06:52:04 +00003#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
Chandni Cherukurid61a7052018-08-01 15:58:48 +05307CSS_USE_SCMI_SDS_DRIVER := 1
8
Nariman Poushin0ece80f2018-02-26 06:52:04 +00009CSS_ENT_BASE := plat/arm/css/sgi
10
Sughosh Ganu3f7e79d2018-05-16 18:48:56 +053011RAS_EXTENSION := 0
12
Sughosh Ganu3f7e79d2018-05-16 18:48:56 +053013SDEI_SUPPORT := 0
14
15EL3_EXCEPTION_HANDLING := 0
16
17HANDLE_EA_EL3_FIRST := 0
18
Nariman Poushin0ece80f2018-02-26 06:52:04 +000019INTERCONNECT_SOURCES := ${CSS_ENT_BASE}/sgi_interconnect.c
20
21PLAT_INCLUDES += -I${CSS_ENT_BASE}/include
22
Nariman Poushin0ece80f2018-02-26 06:52:04 +000023ENT_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
24 drivers/arm/gic/v3/gicv3_main.c \
25 drivers/arm/gic/v3/gicv3_helpers.c \
26 plat/common/plat_gicv3.c \
27 plat/arm/common/arm_gicv3.c \
Nariman Poushin0ece80f2018-02-26 06:52:04 +000028 drivers/arm/gic/v3/gic600.c
29
30
31PLAT_BL_COMMON_SOURCES += ${CSS_ENT_BASE}/sgi_plat.c \
32 ${CSS_ENT_BASE}/aarch64/sgi_helper.S
33
Aditya Angadi20b48412019-04-16 11:29:14 +053034BL1_SOURCES += ${INTERCONNECT_SOURCES} \
35 drivers/arm/sbsa/sbsa.c
Nariman Poushin0ece80f2018-02-26 06:52:04 +000036
Vijayenthiran Subramaniam22141b62018-10-25 22:20:24 +053037BL2_SOURCES += ${CSS_ENT_BASE}/sgi_image_load.c
Nariman Poushin0ece80f2018-02-26 06:52:04 +000038
Chandni Cherukuria3f66132018-08-10 11:17:58 +053039BL31_SOURCES += ${INTERCONNECT_SOURCES} \
Nariman Poushin0ece80f2018-02-26 06:52:04 +000040 ${ENT_GIC_SOURCES} \
41 ${CSS_ENT_BASE}/sgi_bl31_setup.c \
Chandni Cherukuria5d44ec2018-08-14 15:25:34 +053042 ${CSS_ENT_BASE}/sgi_topology.c
Nariman Poushin0ece80f2018-02-26 06:52:04 +000043
Sughosh Ganu18f513d2018-05-16 17:22:35 +053044ifeq (${RAS_EXTENSION},1)
45BL31_SOURCES += ${CSS_ENT_BASE}/sgi_ras.c
46endif
47
Deepak Pandeyb0971f92018-05-25 12:43:30 +053048ifneq (${RESET_TO_BL31},0)
Sandrine Bailleux1e32d322019-01-07 15:35:37 +010049 $(error "Using BL31 as the reset vector is not supported on ${PLAT} platform. \
Deepak Pandeyb0971f92018-05-25 12:43:30 +053050 Please set RESET_TO_BL31 to 0.")
51endif
52
Nariman Poushin0ece80f2018-02-26 06:52:04 +000053$(eval $(call add_define,SGI_PLAT))
54
55override CSS_LOAD_SCP_IMAGES := 0
56override NEED_BL2U := no
57override ARM_BL31_IN_DRAM := 1
Sudipto Paulc4510102018-04-16 17:46:50 +053058override ARM_PLAT_MT := 1
Nariman Poushin0ece80f2018-02-26 06:52:04 +000059
60# System coherency is managed in hardware
61HW_ASSISTED_COHERENCY := 1
62
63# When building for systems with hardware-assisted coherency, there's no need to
64# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too.
65USE_COHERENT_MEM := 0
66
67include plat/arm/common/arm_common.mk
68include plat/arm/css/common/css_common.mk
69include plat/arm/soc/common/soc_css.mk
70include plat/arm/board/common/board_common.mk