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git01.mediatek.com / filogic / atf / 464e155279898ddbe1cf2c2ff5bd46860d46d714 / . / plat / arm / board / neoverse_rd / common / nrd_topology.c
blob: ff04b2b2d1a96b05e7c42c7339340a47df081ebb [file] [log] [blame]
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]1/*
Rohit Mathewa0dd3072024-02-03 17:22:54 +0000[diff] [blame]2 * Copyright (c) 2018-2024, Arm Limited and Contributors. All rights reserved.
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diazbd7b7402019-01-25 14:30:04 +0000[diff] [blame]7#include <plat/arm/common/plat_arm.h>
8
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]9/*
Rohit Mathew6521c1d2024-02-03 22:23:25 +0000[diff] [blame]10 * Common topology related methods for Neoverse RD platforms
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]11 */
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]12/*******************************************************************************
13 * This function returns the core count within the cluster corresponding to
14 * `mpidr`.
15 ******************************************************************************/
16unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr)
17{
Rohit Mathewaac0c3c2024-02-03 22:16:14 +0000[diff] [blame]18 return NRD_MAX_CPUS_PER_CLUSTER;
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]19}
Chandni Cherukurid61a7052018-08-01 15:58:48 +0530[diff] [blame]20
Vijayenthiran Subramaniamf5cb00f2019-12-27 19:27:57 +0530[diff] [blame]21#if ARM_PLAT_MT
Chandni Cherukuri449db452018-08-16 13:45:17 +0530[diff] [blame]22/******************************************************************************
23 * Return the number of PE's supported by the CPU.
24 *****************************************************************************/
25unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr)
26{
Rohit Mathewaac0c3c2024-02-03 22:16:14 +0000[diff] [blame]27 return NRD_MAX_PE_PER_CPU;
Chandni Cherukuri449db452018-08-16 13:45:17 +0530[diff] [blame]28}
Vijayenthiran Subramaniamf5cb00f2019-12-27 19:27:57 +0530[diff] [blame]29#endif