| Pankaj Gupta | 44392ea | 2020-12-09 14:02:38 +0530 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright 2021 NXP |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | * |
| 6 | */ |
| 7 | |
| 8 | #if !defined(FUSE_PROV_H) && defined(POLICY_FUSE_PROVISION) |
| 9 | #define FUSE_PROV_H |
| 10 | |
| 11 | #include <endian.h> |
| 12 | #include <lib/mmio.h> |
| 13 | |
| 14 | #define MASK_NONE U(0xFFFFFFFF) |
| 15 | #define ERROR_WRITE U(0xA) |
| 16 | #define ERROR_ALREADY_BLOWN U(0xB) |
| 17 | |
| 18 | /* Flag bit shifts */ |
| 19 | #define FLAG_POVDD_SHIFT U(0) |
| 20 | #define FLAG_SYSCFG_SHIFT U(1) |
| 21 | #define FLAG_SRKH_SHIFT U(2) |
| 22 | #define FLAG_MC_SHIFT U(3) |
| 23 | #define FLAG_DCV0_SHIFT U(4) |
| 24 | #define FLAG_DCV1_SHIFT U(5) |
| 25 | #define FLAG_DRV0_SHIFT U(6) |
| 26 | #define FLAG_DRV1_SHIFT U(7) |
| 27 | #define FLAG_OUID0_SHIFT U(8) |
| 28 | #define FLAG_OUID1_SHIFT U(9) |
| 29 | #define FLAG_OUID2_SHIFT U(10) |
| 30 | #define FLAG_OUID3_SHIFT U(11) |
| 31 | #define FLAG_OUID4_SHIFT U(12) |
| 32 | #define FLAG_DBG_LVL_SHIFT U(13) |
| 33 | #define FLAG_OTPMK_SHIFT U(16) |
| 34 | #define FLAG_OUID_MASK U(0x1F) |
| 35 | #define FLAG_DEBUG_MASK U(0xF) |
| 36 | #define FLAG_OTPMK_MASK U(0xF) |
| 37 | |
| 38 | /* OTPMK flag values */ |
| 39 | #define PROG_OTPMK_MIN U(0x0) |
| 40 | #define PROG_OTPMK_RANDOM U(0x1) |
| 41 | #define PROG_OTPMK_USER U(0x2) |
| 42 | #define PROG_OTPMK_RANDOM_MIN U(0x5) |
| 43 | #define PROG_OTPMK_USER_MIN U(0x6) |
| 44 | #define PROG_NO_OTPMK U(0x8) |
| 45 | |
| 46 | #define OTPMK_MIM_BITS_MASK U(0xF0000000) |
| 47 | |
| 48 | /* System configuration bit shifts */ |
| 49 | #define SCB_WP_SHIFT U(0) |
| 50 | #define SCB_ITS_SHIFT U(2) |
| 51 | #define SCB_NSEC_SHIFT U(4) |
| 52 | #define SCB_ZD_SHIFT U(5) |
| 53 | #define SCB_K0_SHIFT U(15) |
| 54 | #define SCB_K1_SHIFT U(14) |
| 55 | #define SCB_K2_SHIFT U(13) |
| 56 | #define SCB_K3_SHIFT U(12) |
| 57 | #define SCB_K4_SHIFT U(11) |
| 58 | #define SCB_K5_SHIFT U(10) |
| 59 | #define SCB_K6_SHIFT U(9) |
| 60 | #define SCB_FR0_SHIFT U(30) |
| 61 | #define SCB_FR1_SHIFT U(31) |
| 62 | |
| 63 | /* Fuse Header Structure */ |
| 64 | struct fuse_hdr_t { |
| 65 | uint8_t barker[4]; /* 0x00 Barker code */ |
| 66 | uint32_t flags; /* 0x04 Script flags */ |
| 67 | uint32_t povdd_gpio; /* 0x08 GPIO for POVDD */ |
| 68 | uint32_t otpmk[8]; /* 0x0C-0x2B OTPMK */ |
| 69 | uint32_t srkh[8]; /* 0x2C-0x4B SRKH */ |
| 70 | uint32_t oem_uid[5]; /* 0x4C-0x5F OEM unique id's */ |
| 71 | uint32_t dcv[2]; /* 0x60-0x67 Debug Challenge */ |
| 72 | uint32_t drv[2]; /* 0x68-0x6F Debug Response */ |
| 73 | uint32_t ospr1; /* 0x70 OSPR1 */ |
| 74 | uint32_t sc; /* 0x74 OSPR0 (System Configuration) */ |
| 75 | uint32_t reserved[2]; /* 0x78-0x7F Reserved */ |
| 76 | }; |
| 77 | |
| 78 | /* Function to do fuse provisioning */ |
| 79 | int provision_fuses(unsigned long long fuse_scr_addr, |
| 80 | bool en_povdd_status); |
| 81 | |
| 82 | #define EFUSE_POWERUP_DELAY_mSec U(25) |
| 83 | #endif /* FUSE_PROV_H */ |