| Caesar Wang | b400374 | 2016-10-12 08:10:12 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
| Caesar Wang | b400374 | 2016-10-12 08:10:12 +0800 | [diff] [blame] | 5 | */ |
| 6 | |
| Xing Zheng | b4bcc1d | 2017-02-24 16:26:11 +0800 | [diff] [blame] | 7 | #include <pmu_regs.h> |
| Xing Zheng | 93280b7 | 2016-10-26 21:25:26 +0800 | [diff] [blame] | 8 | #include "rk3399_mcu.h" |
| Caesar Wang | b400374 | 2016-10-12 08:10:12 +0800 | [diff] [blame] | 9 | |
| Xing Zheng | 93280b7 | 2016-10-26 21:25:26 +0800 | [diff] [blame] | 10 | #define M0_SCR 0xe000ed10 /* System Control Register (SCR) */ |
| 11 | |
| 12 | #define SCR_SLEEPDEEP_SHIFT (1 << 2) |
| 13 | |
| 14 | void handle_suspend(void) |
| 15 | { |
| 16 | unsigned int status_value; |
| 17 | |
| 18 | while (1) { |
| 19 | status_value = mmio_read_32(PMU_BASE + PMU_POWER_ST); |
| 20 | if (status_value) { |
| 21 | mmio_clrbits_32(PMU_BASE + PMU_PWRMODE_CON, 0x01); |
| 22 | return; |
| 23 | } |
| Caesar Wang | b400374 | 2016-10-12 08:10:12 +0800 | [diff] [blame] | 24 | } |
| 25 | |
| Xing Zheng | 93280b7 | 2016-10-26 21:25:26 +0800 | [diff] [blame] | 26 | /* m0 enter deep sleep mode */ |
| 27 | mmio_setbits_32(M0_SCR, SCR_SLEEPDEEP_SHIFT); |
| Caesar Wang | b400374 | 2016-10-12 08:10:12 +0800 | [diff] [blame] | 28 | } |