| Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <asm_macros.S> |
| 9 | #include <bl_common.h> |
| 10 | #include <platform_def.h> |
| 11 | |
| 12 | .globl platform_mem_init |
| 13 | .globl plat_report_exception |
| 14 | .globl plat_get_my_entrypoint |
| 15 | .globl plat_secondary_cold_boot_setup |
| 16 | .globl plat_reset_handler |
| 17 | .globl plat_is_my_cpu_primary |
| 18 | .globl plat_my_core_pos |
| 19 | .globl plat_panic_handler |
| 20 | |
| 21 | func platform_mem_init |
| 22 | /* Nothing to do, don't need to init SYSRAM */ |
| 23 | bx lr |
| 24 | endfunc platform_mem_init |
| 25 | |
| 26 | func plat_report_exception |
| 27 | bx lr |
| 28 | endfunc plat_report_exception |
| 29 | |
| 30 | func plat_reset_handler |
| 31 | bx lr |
| 32 | endfunc plat_reset_handler |
| 33 | |
| 34 | /* ------------------------------------------------------------------ |
| 35 | * unsigned long plat_get_my_entrypoint (void); |
| 36 | * |
| 37 | * Main job of this routine is to distinguish between a cold and warm |
| 38 | * boot. |
| 39 | * |
| 40 | * Currently supports only cold boot |
| 41 | * ------------------------------------------------------------------ |
| 42 | */ |
| 43 | func plat_get_my_entrypoint |
| 44 | mov r0, #0 |
| 45 | bx lr |
| 46 | endfunc plat_get_my_entrypoint |
| 47 | |
| 48 | /* --------------------------------------------- |
| 49 | * void plat_secondary_cold_boot_setup (void); |
| 50 | * |
| 51 | * Cold-booting secondary CPUs is not supported. |
| 52 | * --------------------------------------------- |
| 53 | */ |
| 54 | func plat_secondary_cold_boot_setup |
| 55 | b . |
| 56 | endfunc plat_secondary_cold_boot_setup |
| 57 | |
| 58 | /* ----------------------------------------------------- |
| 59 | * unsigned int plat_is_my_cpu_primary (void); |
| 60 | * |
| 61 | * Find out whether the current cpu is the primary cpu. |
| 62 | * ----------------------------------------------------- |
| 63 | */ |
| 64 | func plat_is_my_cpu_primary |
| 65 | ldcopr r0, MPIDR |
| 66 | ldr r1, =(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) |
| 67 | and r0, r1 |
| 68 | cmp r0, #STM32MP1_PRIMARY_CPU |
| 69 | moveq r0, #1 |
| 70 | movne r0, #0 |
| 71 | bx lr |
| 72 | endfunc plat_is_my_cpu_primary |
| 73 | |
| 74 | /* ------------------------------------------- |
| 75 | * int plat_stm32mp1_get_core_pos(int mpidr); |
| 76 | * |
| 77 | * Return CorePos = (ClusterId * 4) + CoreId |
| 78 | * ------------------------------------------- |
| 79 | */ |
| 80 | func plat_stm32mp1_get_core_pos |
| 81 | and r1, r0, #MPIDR_CPU_MASK |
| 82 | and r0, r0, #MPIDR_CLUSTER_MASK |
| 83 | add r0, r1, r0, LSR #6 |
| 84 | bx lr |
| 85 | endfunc plat_stm32mp1_get_core_pos |
| 86 | |
| 87 | /* ------------------------------------ |
| 88 | * unsigned int plat_my_core_pos(void) |
| 89 | * ------------------------------------ |
| 90 | */ |
| 91 | func plat_my_core_pos |
| 92 | ldcopr r0, MPIDR |
| 93 | b plat_stm32mp1_get_core_pos |
| 94 | endfunc plat_my_core_pos |