blob: ca55036dd7a76c3410f2bd6ca51647305a0b9f70 [file] [log] [blame]
Tony K Nadackala81a3d92021-11-24 16:09:26 +00001# Copyright (c) 2020-2023, Arm Limited and Contributors. All rights reserved.
Aditya Angadid61740b2020-11-19 18:05:33 +05302#
3# SPDX-License-Identifier: BSD-3-Clause
4#
5
Tony K Nadackala81a3d92021-11-24 16:09:26 +00006RD_N2_VARIANTS := 0 1 2 3
Aditya Angadiccae8a12021-08-09 09:38:58 +05307ifneq ($(CSS_SGI_PLATFORM_VARIANT),\
8 $(filter $(CSS_SGI_PLATFORM_VARIANT),$(RD_N2_VARIANTS)))
Tony K Nadackala81a3d92021-11-24 16:09:26 +00009 $(error "CSS_SGI_PLATFORM_VARIANT for RD-N2 should be 0, 1, 2 or 3, currently \
10 set to ${CSS_SGI_PLATFORM_VARIANT}.")
Aditya Angadiccae8a12021-08-09 09:38:58 +053011endif
12
13$(eval $(call CREATE_SEQ,SEQ,4))
14ifneq ($(CSS_SGI_CHIP_COUNT),$(filter $(CSS_SGI_CHIP_COUNT),$(SEQ)))
15 $(error "Chip count for RD-N2-MC should be either $(SEQ) \
16 currently it is set to ${CSS_SGI_CHIP_COUNT}.")
17endif
18
Andre Przywarab6c24ce2021-07-20 19:20:07 +010019# RD-N2 platform uses GIC-700 which is based on GICv4.1
Aditya Angadid61740b2020-11-19 18:05:33 +053020GIC_ENABLE_V4_EXTN := 1
Vivek Gautam44a91512022-09-14 13:44:52 +053021GIC_EXT_INTID := 1
Aditya Angadid61740b2020-11-19 18:05:33 +053022
Aditya Angadiccae8a12021-08-09 09:38:58 +053023#Enable GIC Multichip Extension only for Multichip Platforms
24ifeq (${CSS_SGI_PLATFORM_VARIANT}, 2)
25GICV3_IMPL_GIC600_MULTICHIP := 1
26endif
27
Pranav Madhu078dc522022-07-27 14:01:24 +053028override CSS_SYSTEM_GRACEFUL_RESET := 1
29override EL3_EXCEPTION_HANDLING := 1
30
Aditya Angadid61740b2020-11-19 18:05:33 +053031include plat/arm/css/sgi/sgi-common.mk
32
33RDN2_BASE = plat/arm/board/rdn2
34
35PLAT_INCLUDES += -I${RDN2_BASE}/include/
36
Tony K Nadackale23ca812021-08-19 14:44:11 +010037SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_n2.S \
Joel Goddarda1c50ab2022-09-21 21:52:28 +053038 lib/cpus/aarch64/neoverse_v2.S
Aditya Angadid61740b2020-11-19 18:05:33 +053039
40PLAT_BL_COMMON_SOURCES += ${CSS_ENT_BASE}/sgi_plat_v2.c
41
42BL1_SOURCES += ${SGI_CPU_SOURCES} \
43 ${RDN2_BASE}/rdn2_err.c
44
45BL2_SOURCES += ${RDN2_BASE}/rdn2_plat.c \
46 ${RDN2_BASE}/rdn2_security.c \
47 ${RDN2_BASE}/rdn2_err.c \
48 lib/utils/mem_region.c \
49 drivers/arm/tzc/tzc400.c \
50 plat/arm/common/arm_tzc400.c \
51 plat/arm/common/arm_nor_psci_mem_protect.c
52
53BL31_SOURCES += ${SGI_CPU_SOURCES} \
54 ${RDN2_BASE}/rdn2_plat.c \
55 ${RDN2_BASE}/rdn2_topology.c \
56 drivers/cfi/v2m/v2m_flash.c \
57 lib/utils/mem_region.c \
58 plat/arm/common/arm_nor_psci_mem_protect.c
59
60ifeq (${TRUSTED_BOARD_BOOT}, 1)
61BL1_SOURCES += ${RDN2_BASE}/rdn2_trusted_boot.c
62BL2_SOURCES += ${RDN2_BASE}/rdn2_trusted_boot.c
63endif
64
Aditya Angadiccae8a12021-08-09 09:38:58 +053065ifeq (${CSS_SGI_PLATFORM_VARIANT}, 2)
66BL31_SOURCES += drivers/arm/gic/v3/gic600_multichip.c
67
68# Enable dynamic addition of MMAP regions in BL31
69BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
70endif
71
Aditya Angadid61740b2020-11-19 18:05:33 +053072# Add the FDT_SOURCES and options for Dynamic Config
73FDT_SOURCES += ${RDN2_BASE}/fdts/${PLAT}_fw_config.dts \
74 ${RDN2_BASE}/fdts/${PLAT}_tb_fw_config.dts
75FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
76TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
77
78# Add the FW_CONFIG to FIP and specify the same to certtool
79$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
80# Add the TB_FW_CONFIG to FIP and specify the same to certtool
81$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
82
83FDT_SOURCES += ${RDN2_BASE}/fdts/${PLAT}_nt_fw_config.dts
84NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
85
86# Add the NT_FW_CONFIG to FIP and specify the same to certtool
87$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config))
88
89override CTX_INCLUDE_AARCH32_REGS := 0
Andre Przywara0b7f1b02023-03-21 13:53:19 +000090override ENABLE_FEAT_AMU := 1