Jorge Ramirez-Ortiz | a29d9a6 | 2017-06-28 10:11:31 +0200 | [diff] [blame] | 1 | /* |
Antonio Nino Diaz | 6766bb1 | 2018-10-26 11:12:31 +0100 | [diff] [blame] | 2 | * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. |
Jorge Ramirez-Ortiz | a29d9a6 | 2017-06-28 10:11:31 +0200 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <arch_helpers.h> |
Jorge Ramirez-Ortiz | a29d9a6 | 2017-06-28 10:11:31 +0200 | [diff] [blame] | 9 | #include <assert.h> |
| 10 | #include <bl31.h> |
| 11 | #include <bl_common.h> |
| 12 | #include <console.h> |
| 13 | #include <cortex_a53.h> |
| 14 | #include <debug.h> |
| 15 | #include <errno.h> |
| 16 | #include <generic_delay_timer.h> |
| 17 | #include <mmio.h> |
Jorge Ramirez-Ortiz | a29d9a6 | 2017-06-28 10:11:31 +0200 | [diff] [blame] | 18 | #include <platform.h> |
Antonio Nino Diaz | 6766bb1 | 2018-10-26 11:12:31 +0100 | [diff] [blame] | 19 | #include <platform_def.h> |
Jorge Ramirez-Ortiz | a29d9a6 | 2017-06-28 10:11:31 +0200 | [diff] [blame] | 20 | #include <stddef.h> |
| 21 | #include <string.h> |
| 22 | #include "hi3798cv200.h" |
| 23 | #include "plat_private.h" |
Jorge Ramirez-Ortiz | a29d9a6 | 2017-06-28 10:11:31 +0200 | [diff] [blame] | 24 | |
| 25 | /* Memory ranges for code and RO data sections */ |
| 26 | #define BL31_RO_BASE (unsigned long)(&__RO_START__) |
| 27 | #define BL31_RO_LIMIT (unsigned long)(&__RO_END__) |
| 28 | |
| 29 | /* Memory ranges for coherent memory section */ |
| 30 | #define BL31_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) |
| 31 | #define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) |
| 32 | |
Jiancheng Xue | b88b08a | 2017-08-28 18:55:43 +0800 | [diff] [blame] | 33 | #define TZPC_SEC_ATTR_CTRL_VALUE (0x9DB98D45) |
| 34 | |
Victor Chong | 662556a | 2017-10-28 01:59:41 +0900 | [diff] [blame] | 35 | static entry_point_info_t bl32_image_ep_info; |
Jorge Ramirez-Ortiz | a29d9a6 | 2017-06-28 10:11:31 +0200 | [diff] [blame] | 36 | static entry_point_info_t bl33_image_ep_info; |
| 37 | |
Jiancheng Xue | b88b08a | 2017-08-28 18:55:43 +0800 | [diff] [blame] | 38 | static void hisi_tzpc_sec_init(void) |
| 39 | { |
| 40 | mmio_write_32(HISI_TZPC_SEC_ATTR_CTRL, TZPC_SEC_ATTR_CTRL_VALUE); |
| 41 | } |
| 42 | |
Jorge Ramirez-Ortiz | a29d9a6 | 2017-06-28 10:11:31 +0200 | [diff] [blame] | 43 | entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) |
| 44 | { |
Victor Chong | 662556a | 2017-10-28 01:59:41 +0900 | [diff] [blame] | 45 | entry_point_info_t *next_image_info; |
| 46 | |
| 47 | assert(sec_state_is_valid(type)); |
| 48 | next_image_info = (type == NON_SECURE) |
| 49 | ? &bl33_image_ep_info : &bl32_image_ep_info; |
| 50 | /* |
| 51 | * None of the images on the ARM development platforms can have 0x0 |
| 52 | * as the entrypoint |
| 53 | */ |
| 54 | if (next_image_info->pc) |
| 55 | return next_image_info; |
| 56 | else |
| 57 | return NULL; |
Jorge Ramirez-Ortiz | a29d9a6 | 2017-06-28 10:11:31 +0200 | [diff] [blame] | 58 | } |
| 59 | |
Victor Chong | 175dd8a | 2018-02-01 00:35:22 +0900 | [diff] [blame] | 60 | /******************************************************************************* |
| 61 | * Perform any BL31 early platform setup common to ARM standard platforms. |
| 62 | * Here is an opportunity to copy parameters passed by the calling EL (S-EL1 |
John Tsichritzis | d653d33 | 2018-09-14 10:34:57 +0100 | [diff] [blame] | 63 | * in BL2 & EL3 in BL1) before they are lost (potentially). This needs to be |
Victor Chong | 175dd8a | 2018-02-01 00:35:22 +0900 | [diff] [blame] | 64 | * done before the MMU is initialized so that the memory layout can be used |
| 65 | * while creating page tables. BL2 has flushed this information to memory, so |
| 66 | * we are guaranteed to pick up good data. |
| 67 | ******************************************************************************/ |
Antonio Nino Diaz | e93cde1 | 2018-09-24 17:15:15 +0100 | [diff] [blame] | 68 | void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, |
| 69 | u_register_t arg2, u_register_t arg3) |
Jorge Ramirez-Ortiz | a29d9a6 | 2017-06-28 10:11:31 +0200 | [diff] [blame] | 70 | { |
Antonio Nino Diaz | e93cde1 | 2018-09-24 17:15:15 +0100 | [diff] [blame] | 71 | void *from_bl2; |
| 72 | |
| 73 | from_bl2 = (void *) arg0; |
| 74 | |
Jorge Ramirez-Ortiz | a29d9a6 | 2017-06-28 10:11:31 +0200 | [diff] [blame] | 75 | console_init(PL011_UART0_BASE, PL011_UART0_CLK_IN_HZ, PL011_BAUDRATE); |
| 76 | |
| 77 | /* Init console for crash report */ |
| 78 | plat_crash_console_init(); |
| 79 | |
Victor Chong | 175dd8a | 2018-02-01 00:35:22 +0900 | [diff] [blame] | 80 | /* |
| 81 | * Check params passed from BL2 should not be NULL, |
| 82 | */ |
Antonio Nino Diaz | e93cde1 | 2018-09-24 17:15:15 +0100 | [diff] [blame] | 83 | bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2; |
| 84 | |
Victor Chong | 175dd8a | 2018-02-01 00:35:22 +0900 | [diff] [blame] | 85 | assert(params_from_bl2 != NULL); |
Antonio Nino Diaz | e93cde1 | 2018-09-24 17:15:15 +0100 | [diff] [blame] | 86 | assert(params_from_bl2->h.type == PARAM_BL_PARAMS); |
| 87 | assert(params_from_bl2->h.version >= VERSION_2); |
| 88 | |
| 89 | bl_params_node_t *bl_params = params_from_bl2->head; |
Victor Chong | 662556a | 2017-10-28 01:59:41 +0900 | [diff] [blame] | 90 | |
| 91 | /* |
Antonio Nino Diaz | e93cde1 | 2018-09-24 17:15:15 +0100 | [diff] [blame] | 92 | * Copy BL33 and BL32 (if present), entry point information. |
Victor Chong | 662556a | 2017-10-28 01:59:41 +0900 | [diff] [blame] | 93 | * They are stored in Secure RAM, in BL2's address space. |
| 94 | */ |
Antonio Nino Diaz | e93cde1 | 2018-09-24 17:15:15 +0100 | [diff] [blame] | 95 | while (bl_params) { |
| 96 | if (bl_params->image_id == BL32_IMAGE_ID) |
| 97 | bl32_image_ep_info = *bl_params->ep_info; |
| 98 | |
| 99 | if (bl_params->image_id == BL33_IMAGE_ID) |
| 100 | bl33_image_ep_info = *bl_params->ep_info; |
| 101 | |
| 102 | bl_params = bl_params->next_params_info; |
| 103 | } |
| 104 | |
| 105 | if (bl33_image_ep_info.pc == 0) |
| 106 | panic(); |
Jorge Ramirez-Ortiz | a29d9a6 | 2017-06-28 10:11:31 +0200 | [diff] [blame] | 107 | } |
| 108 | |
| 109 | void bl31_platform_setup(void) |
| 110 | { |
| 111 | /* Init arch timer */ |
| 112 | generic_delay_timer_init(); |
| 113 | |
| 114 | /* Init GIC distributor and CPU interface */ |
Antonio Nino Diaz | 6766bb1 | 2018-10-26 11:12:31 +0100 | [diff] [blame] | 115 | poplar_gic_driver_init(); |
| 116 | poplar_gic_init(); |
Jiancheng Xue | b88b08a | 2017-08-28 18:55:43 +0800 | [diff] [blame] | 117 | |
| 118 | /* Init security properties of IP blocks */ |
| 119 | hisi_tzpc_sec_init(); |
Jorge Ramirez-Ortiz | a29d9a6 | 2017-06-28 10:11:31 +0200 | [diff] [blame] | 120 | } |
| 121 | |
| 122 | void bl31_plat_runtime_setup(void) |
| 123 | { |
| 124 | /* do nothing */ |
| 125 | } |
| 126 | |
| 127 | void bl31_plat_arch_setup(void) |
| 128 | { |
Victor Chong | 175dd8a | 2018-02-01 00:35:22 +0900 | [diff] [blame] | 129 | plat_configure_mmu_el3(BL31_BASE, |
| 130 | (BL31_LIMIT - BL31_BASE), |
Jorge Ramirez-Ortiz | a29d9a6 | 2017-06-28 10:11:31 +0200 | [diff] [blame] | 131 | BL31_RO_BASE, |
| 132 | BL31_RO_LIMIT, |
| 133 | BL31_COHERENT_RAM_BASE, |
| 134 | BL31_COHERENT_RAM_LIMIT); |
| 135 | |
| 136 | INFO("Boot BL33 from 0x%lx for %lu Bytes\n", |
| 137 | bl33_image_ep_info.pc, bl33_image_ep_info.args.arg2); |
| 138 | } |