blob: b13ce9f0ee62a6c9c2fe55c797394a12e55c8fd1 [file] [log] [blame]
Gary Morrison3d7f6542021-01-27 13:08:47 -06001/*
2 * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <assert.h>
8
9#include "../../../../bl1/bl1_private.h"
10#include <arch.h>
11#include <arch_features.h>
12#include <arch_helpers.h>
13#include <bl1/bl1.h>
14#include <common/bl_common.h>
15#include <common/debug.h>
16#include <drivers/auth/auth_mod.h>
17#include <drivers/console.h>
18#include <lib/cpus/errata_report.h>
19#include <lib/utils.h>
20#include <smccc_helpers.h>
21#include <tools_share/uuid.h>
22#include <plat/common/platform.h>
23
24#include <platform_def.h>
25
26
27static void bl1_load_bl2(void);
28
29#if ENABLE_PAUTH
30uint64_t bl1_apiakey[2];
31#endif
32
33/*******************************************************************************
34 * Helper utility to calculate the BL2 memory layout taking into consideration
35 * the BL1 RW data assuming that it is at the top of the memory layout.
36 ******************************************************************************/
37void bl1_calc_bl2_mem_layout(const meminfo_t *bl1_mem_layout,
38 meminfo_t *bl2_mem_layout)
39{
40 assert(bl1_mem_layout != NULL);
41 assert(bl2_mem_layout != NULL);
42
43 /*
44 * Remove BL1 RW data from the scope of memory visible to BL2.
45 * This is assuming BL1 RW data is at the top of bl1_mem_layout.
46 */
47 assert(bl1_mem_layout->total_base < BL1_RW_BASE);
48 bl2_mem_layout->total_base = bl1_mem_layout->total_base;
49 bl2_mem_layout->total_size = BL1_RW_BASE - bl1_mem_layout->total_base;
50
51 flush_dcache_range((uintptr_t)bl2_mem_layout, sizeof(meminfo_t));
52}
53
54/*******************************************************************************
55 * Setup function for BL1.
56 ******************************************************************************/
57void bl1_setup(void)
58{
59 /* Perform early platform-specific setup */
60 bl1_early_platform_setup();
61
62 /* Perform late platform-specific setup */
63 bl1_plat_arch_setup();
64
65#if CTX_INCLUDE_PAUTH_REGS
66 /*
67 * Assert that the ARMv8.3-PAuth registers are present or an access
68 * fault will be triggered when they are being saved or restored.
69 */
70 assert(is_armv8_3_pauth_present());
71#endif /* CTX_INCLUDE_PAUTH_REGS */
72}
73
74/*******************************************************************************
75 * Function to perform late architectural and platform specific initialization.
76 * It also queries the platform to load and run next BL image. Only called
77 * by the primary cpu after a cold boot.
78 ******************************************************************************/
79void bl1_main(void)
80{
81 unsigned int image_id;
82
83 /* Announce our arrival */
84 NOTICE(FIRMWARE_WELCOME_STR);
85 NOTICE("BL1: %s\n", version_string);
86 NOTICE("BL1: %s\n", build_message);
87
88 INFO("BL1: RAM %p - %p\n", (void *)BL1_RAM_BASE, (void *)BL1_RAM_LIMIT);
89
90 print_errata_status();
91
92#if ENABLE_ASSERTIONS
93 u_register_t val;
94 /*
95 * Ensure that MMU/Caches and coherency are turned on
96 */
97 val = read_sctlr_el2();
98
99 assert((val & SCTLR_M_BIT) != 0U);
100 assert((val & SCTLR_C_BIT) != 0U);
101 assert((val & SCTLR_I_BIT) != 0U);
102 /*
103 * Check that Cache Writeback Granule (CWG) in CTR_EL0 matches the
104 * provided platform value
105 */
106 val = (read_ctr_el0() >> CTR_CWG_SHIFT) & CTR_CWG_MASK;
107 /*
108 * If CWG is zero, then no CWG information is available but we can
109 * at least check the platform value is less than the architectural
110 * maximum.
111 */
112 if (val != 0) {
113 assert(SIZE_FROM_LOG2_WORDS(val) == CACHE_WRITEBACK_GRANULE);
114 } else {
115 assert(CACHE_WRITEBACK_GRANULE <= MAX_CACHE_LINE_SIZE);
116 }
117#endif /* ENABLE_ASSERTIONS */
118
119 /* Perform remaining generic architectural setup from EL2 */
120 bl1_arch_setup();
121
122#if TRUSTED_BOARD_BOOT
123 /* Initialize authentication module */
124 auth_mod_init();
125#endif /* TRUSTED_BOARD_BOOT */
126
127 /* Perform platform setup in BL1. */
128 bl1_platform_setup();
129
130#if ENABLE_PAUTH
131 /* Store APIAKey_EL1 key */
132 bl1_apiakey[0] = read_apiakeylo_el1();
133 bl1_apiakey[1] = read_apiakeyhi_el1();
134#endif /* ENABLE_PAUTH */
135
136 /* Get the image id of next image to load and run. */
137 image_id = bl1_plat_get_next_image_id();
138
139 /*
140 * We currently interpret any image id other than
141 * BL2_IMAGE_ID as the start of firmware update.
142 */
143 if (image_id == BL2_IMAGE_ID) {
144 bl1_load_bl2();
145 } else {
146 NOTICE("BL1-FWU: *******FWU Process Started*******\n");
147 }
148 bl1_prepare_next_image(image_id);
149
150 console_flush();
151}
152
153/*******************************************************************************
154 * This function locates and loads the BL2 raw binary image in the trusted SRAM.
155 * Called by the primary cpu after a cold boot.
156 * TODO: Add support for alternative image load mechanism e.g using virtio/elf
157 * loader etc.
158 ******************************************************************************/
159static void bl1_load_bl2(void)
160{
161 image_desc_t *desc;
162 image_info_t *info;
163 int err;
164
165 /* Get the image descriptor */
166 desc = bl1_plat_get_image_desc(BL2_IMAGE_ID);
167 assert(desc != NULL);
168
169 /* Get the image info */
170 info = &desc->image_info;
171 INFO("BL1: Loading BL2\n");
172
173 err = bl1_plat_handle_pre_image_load(BL2_IMAGE_ID);
174 if (err != 0) {
175 ERROR("Failure in pre image load handling of BL2 (%d)\n", err);
176 plat_error_handler(err);
177 }
178
179 err = load_auth_image(BL2_IMAGE_ID, info);
180 if (err != 0) {
181 ERROR("Failed to load BL2 firmware.\n");
182 plat_error_handler(err);
183 }
184
185 /* Allow platform to handle image information. */
186 err = bl1_plat_handle_post_image_load(BL2_IMAGE_ID);
187 if (err != 0) {
188 ERROR("Failure in post image load handling of BL2 (%d)\n", err);
189 plat_error_handler(err);
190 }
191
192 NOTICE("BL1: Booting BL2\n");
193}
194
195/*******************************************************************************
196 * Function called just before handing over to the next BL to inform the user
197 * about the boot progress. In debug mode, also print details about the BL
198 * image's execution context.
199 ******************************************************************************/
200void bl1_print_next_bl_ep_info(const entry_point_info_t *bl_ep_info)
201{
202 NOTICE("BL1: Booting BL31\n");
203 print_entry_point_info(bl_ep_info);
204}
205
206#if SPIN_ON_BL1_EXIT
207void print_debug_loop_message(void)
208{
209 NOTICE("BL1: Debug loop, spinning forever\n");
210 NOTICE("BL1: Please connect the debugger to continue\n");
211}
212#endif
213