| Loh Tien Hock | 59400a4 | 2019-02-04 16:17:24 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <asm_macros.S> |
| 9 | #include <cpu_macros.S> |
| 10 | #include <platform_def.h> |
| 11 | |
| 12 | .globl plat_secondary_cold_boot_setup |
| 13 | .globl platform_is_primary_cpu |
| 14 | .globl plat_is_my_cpu_primary |
| 15 | .globl plat_my_core_pos |
| 16 | .globl plat_crash_console_init |
| 17 | .globl plat_crash_console_putc |
| 18 | .globl plat_crash_console_flush |
| 19 | .globl platform_mem_init |
| 20 | |
| 21 | .globl plat_get_my_entrypoint |
| 22 | .globl stratix10_sec_entry |
| 23 | .globl cpuid_release |
| 24 | |
| 25 | /* ----------------------------------------------------- |
| 26 | * void plat_secondary_cold_boot_setup (void); |
| 27 | * |
| 28 | * This function performs any platform specific actions |
| 29 | * needed for a secondary cpu after a cold reset e.g |
| 30 | * mark the cpu's presence, mechanism to place it in a |
| 31 | * holding pen etc. |
| 32 | * ----------------------------------------------------- |
| 33 | */ |
| 34 | func plat_secondary_cold_boot_setup |
| 35 | /* Wait until the it gets reset signal from rstmgr gets populated */ |
| 36 | poll_mailbox: |
| 37 | wfi |
| 38 | |
| 39 | adr x0, stratix10_sec_entry |
| 40 | ldr x1, [x0] |
| 41 | adr x2, cpuid_release |
| 42 | ldr x3, [x2] |
| 43 | mrs x4, mpidr_el1 |
| 44 | and x4, x4, #0xff |
| 45 | cmp x3, x4 |
| 46 | b.ne poll_mailbox |
| 47 | br x1 |
| 48 | endfunc plat_secondary_cold_boot_setup |
| 49 | |
| 50 | func platform_is_primary_cpu |
| 51 | and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) |
| 52 | cmp x0, #PLAT_PRIMARY_CPU |
| 53 | cset x0, eq |
| 54 | ret |
| 55 | endfunc platform_is_primary_cpu |
| 56 | |
| 57 | func plat_is_my_cpu_primary |
| 58 | mrs x0, mpidr_el1 |
| 59 | b platform_is_primary_cpu |
| 60 | endfunc plat_is_my_cpu_primary |
| 61 | |
| 62 | func plat_my_core_pos |
| 63 | mrs x0, mpidr_el1 |
| 64 | and x1, x0, #MPIDR_CPU_MASK |
| 65 | and x0, x0, #MPIDR_CLUSTER_MASK |
| 66 | add x0, x1, x0, LSR #6 |
| 67 | ret |
| 68 | endfunc plat_my_core_pos |
| 69 | |
| 70 | func plat_get_my_entrypoint |
| 71 | adr x1,stratix10_sec_entry |
| 72 | ldr x0, [x1] |
| 73 | ret |
| 74 | endfunc plat_get_my_entrypoint |
| 75 | |
| 76 | /* --------------------------------------------- |
| 77 | * int plat_crash_console_init(void) |
| 78 | * Function to initialize the crash console |
| 79 | * without a C Runtime to print crash report. |
| 80 | * Clobber list : x0, x1, x2 |
| 81 | * --------------------------------------------- |
| 82 | */ |
| 83 | func plat_crash_console_init |
| 84 | mov_imm x0, PLAT_UART0_BASE |
| 85 | mov_imm x1, PLAT_UART_CLOCK |
| 86 | mov_imm x2, PLAT_BAUDRATE |
| 87 | b console_16550_core_init |
| 88 | endfunc plat_crash_console_init |
| 89 | |
| 90 | /* --------------------------------------------- |
| 91 | * int plat_crash_console_putc(void) |
| 92 | * Function to print a character on the crash |
| 93 | * console without a C Runtime. |
| 94 | * Clobber list : x1, x2 |
| 95 | * --------------------------------------------- |
| 96 | */ |
| 97 | func plat_crash_console_putc |
| 98 | mov_imm x1, PLAT_UART0_BASE |
| 99 | b console_16550_core_putc |
| 100 | endfunc plat_crash_console_putc |
| 101 | |
| 102 | func plat_crash_console_flush |
| 103 | mov_imm x0, CRASH_CONSOLE_BASE |
| 104 | b console_16550_core_flush |
| 105 | endfunc plat_crash_console_flush |
| 106 | |
| 107 | |
| 108 | /* -------------------------------------------------------- |
| 109 | * void platform_mem_init (void); |
| 110 | * |
| 111 | * Any memory init, relocation to be done before the |
| 112 | * platform boots. Called very early in the boot process. |
| 113 | * -------------------------------------------------------- |
| 114 | */ |
| 115 | func platform_mem_init |
| 116 | mov x0, #0 |
| 117 | ret |
| 118 | endfunc platform_mem_init |
| 119 | |
| 120 | |
| 121 | .data |
| 122 | .align 3 |
| 123 | |
| 124 | stratix10_sec_entry: |
| 125 | .quad 0 |
| 126 | |
| 127 | cpuid_release: |
| 128 | .quad 0 |
| 129 | |