blob: 986bd70a5cb621e5a67002950af137cecc565dfb [file] [log] [blame]
Deepak Pandey9cbacf62018-08-08 10:32:51 +05301#
John Tsichritzis56369c12019-02-19 13:49:06 +00002# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
Deepak Pandey9cbacf62018-08-08 10:32:51 +05303#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7
8N1SDP_BASE := plat/arm/board/n1sdp
9
10INTERCONNECT_SOURCES := ${N1SDP_BASE}/n1sdp_interconnect.c
11
12PLAT_INCLUDES := -I${N1SDP_BASE}/include
13
14
John Tsichritzis56369c12019-02-19 13:49:06 +000015N1SDP_CPU_SOURCES := lib/cpus/aarch64/neoverse_n1.S
Deepak Pandey9cbacf62018-08-08 10:32:51 +053016
17
18N1SDP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
19 drivers/arm/gic/v3/gicv3_main.c \
20 drivers/arm/gic/v3/gicv3_helpers.c \
21 plat/common/plat_gicv3.c \
22 plat/arm/common/arm_gicv3.c \
23 drivers/arm/gic/v3/gic600.c
24
25PLAT_BL_COMMON_SOURCES := ${N1SDP_BASE}/n1sdp_plat.c \
26 ${N1SDP_BASE}/aarch64/n1sdp_helper.S
27
Aditya Angadi20b48412019-04-16 11:29:14 +053028BL1_SOURCES += drivers/arm/sbsa/sbsa.c
Deepak Pandey9cbacf62018-08-08 10:32:51 +053029
30BL31_SOURCES := ${N1SDP_CPU_SOURCES} \
31 ${INTERCONNECT_SOURCES} \
32 ${N1SDP_GIC_SOURCES} \
33 ${N1SDP_BASE}/n1sdp_bl31_setup.c \
34 ${N1SDP_BASE}/n1sdp_topology.c \
Manoj Kumar69bebd82019-06-21 17:07:13 +010035 ${N1SDP_BASE}/n1sdp_security.c \
36 drivers/arm/css/sds/sds.c
Deepak Pandey9cbacf62018-08-08 10:32:51 +053037
38
39# TF-A not required to load the SCP Images
40override CSS_LOAD_SCP_IMAGES := 0
41
42# BL1/BL2 Image not a part of the capsule Image for n1sdp
43override NEED_BL1 := no
44override NEED_BL2 := no
45override NEED_BL2U := no
46
47#TFA for n1sdp starts from BL31
48override RESET_TO_BL31 := 1
49
50# 32 bit mode not supported
51override CTX_INCLUDE_AARCH32_REGS := 0
52
53override ARM_PLAT_MT := 1
54
55# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the
56# SCP during power management operations and for SCP RAM Firmware transfer.
57CSS_USE_SCMI_SDS_DRIVER := 1
58
59# System coherency is managed in hardware
60HW_ASSISTED_COHERENCY := 1
61
62# When building for systems with hardware-assisted coherency, there's no need to
63# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too.
64USE_COHERENT_MEM := 0
65include plat/arm/common/arm_common.mk
66include plat/arm/css/common/css_common.mk
Deepak Pandey9cbacf62018-08-08 10:32:51 +053067include plat/arm/board/common/board_common.mk
68