Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 1 | /* |
Suyash Pathak | b71a9e6 | 2020-02-04 13:55:20 +0530 | [diff] [blame] | 2 | * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved. |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 7 | #include <platform_def.h> |
| 8 | |
| 9 | #include <common/debug.h> |
| 10 | #include <drivers/arm/tzc400.h> |
Antonio Nino Diaz | bd7b740 | 2019-01-25 14:30:04 +0000 | [diff] [blame] | 11 | #include <plat/arm/common/plat_arm.h> |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 12 | |
| 13 | /* Weak definitions may be overridden in specific ARM standard platform */ |
| 14 | #pragma weak plat_arm_security_setup |
| 15 | |
| 16 | |
| 17 | /******************************************************************************* |
| 18 | * Initialize the TrustZone Controller for ARM standard platforms. |
Sandrine Bailleux | 03897bb | 2015-11-26 16:31:34 +0000 | [diff] [blame] | 19 | * When booting an EL3 payload, this is simplified: we configure region 0 with |
| 20 | * secure access only and do not enable any other region. |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 21 | ******************************************************************************/ |
Suyash Pathak | b71a9e6 | 2020-02-04 13:55:20 +0530 | [diff] [blame] | 22 | void arm_tzc400_setup(uintptr_t tzc_base, |
| 23 | const arm_tzc_regions_info_t *tzc_regions) |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 24 | { |
Summer Qin | 5ce394c | 2018-03-12 11:28:26 +0800 | [diff] [blame] | 25 | #ifndef EL3_PAYLOAD_BASE |
Antonio Nino Diaz | 5f47579 | 2018-10-15 14:58:11 +0100 | [diff] [blame] | 26 | unsigned int region_index = 1U; |
Summer Qin | 5ce394c | 2018-03-12 11:28:26 +0800 | [diff] [blame] | 27 | const arm_tzc_regions_info_t *p; |
| 28 | const arm_tzc_regions_info_t init_tzc_regions[] = { |
| 29 | ARM_TZC_REGIONS_DEF, |
| 30 | {0} |
| 31 | }; |
| 32 | #endif |
| 33 | |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 34 | INFO("Configuring TrustZone Controller\n"); |
| 35 | |
Suyash Pathak | b71a9e6 | 2020-02-04 13:55:20 +0530 | [diff] [blame] | 36 | tzc400_init(tzc_base); |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 37 | |
| 38 | /* Disable filters. */ |
Soby Mathew | 9c708b5 | 2016-02-26 14:23:19 +0000 | [diff] [blame] | 39 | tzc400_disable_filters(); |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 40 | |
Sandrine Bailleux | 03897bb | 2015-11-26 16:31:34 +0000 | [diff] [blame] | 41 | #ifndef EL3_PAYLOAD_BASE |
Summer Qin | 5ce394c | 2018-03-12 11:28:26 +0800 | [diff] [blame] | 42 | if (tzc_regions == NULL) |
| 43 | p = init_tzc_regions; |
| 44 | else |
| 45 | p = tzc_regions; |
Soby Mathew | 7e4d665 | 2017-05-10 11:50:30 +0100 | [diff] [blame] | 46 | |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 47 | /* Region 0 set to no access by default */ |
Soby Mathew | 9c708b5 | 2016-02-26 14:23:19 +0000 | [diff] [blame] | 48 | tzc400_configure_region0(TZC_REGION_S_NONE, 0); |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 49 | |
Summer Qin | 5ce394c | 2018-03-12 11:28:26 +0800 | [diff] [blame] | 50 | /* Rest Regions set according to tzc_regions array */ |
| 51 | for (; p->base != 0ULL; p++) { |
| 52 | tzc400_configure_region(PLAT_ARM_TZC_FILTERS, region_index, |
| 53 | p->base, p->end, p->sec_attr, p->nsaid_permissions); |
| 54 | region_index++; |
| 55 | } |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 56 | |
Antonio Nino Diaz | 5f47579 | 2018-10-15 14:58:11 +0100 | [diff] [blame] | 57 | INFO("Total %u regions set.\n", region_index); |
Antonio Nino Diaz | 7289f92 | 2017-11-09 11:34:09 +0000 | [diff] [blame] | 58 | |
| 59 | #else /* if defined(EL3_PAYLOAD_BASE) */ |
| 60 | |
Soby Mathew | 15b149e | 2017-11-13 08:29:45 +0000 | [diff] [blame] | 61 | /* Allow Secure and Non-secure access to DRAM for EL3 payloads */ |
| 62 | tzc400_configure_region0(TZC_REGION_S_RDWR, PLAT_ARM_TZC_NS_DEV_ACCESS); |
Antonio Nino Diaz | 7289f92 | 2017-11-09 11:34:09 +0000 | [diff] [blame] | 63 | |
Sandrine Bailleux | 03897bb | 2015-11-26 16:31:34 +0000 | [diff] [blame] | 64 | #endif /* EL3_PAYLOAD_BASE */ |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 65 | |
| 66 | /* |
| 67 | * Raise an exception if a NS device tries to access secure memory |
| 68 | * TODO: Add interrupt handling support. |
| 69 | */ |
Soby Mathew | 9c708b5 | 2016-02-26 14:23:19 +0000 | [diff] [blame] | 70 | tzc400_set_action(TZC_ACTION_ERR); |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 71 | |
| 72 | /* Enable filters. */ |
Soby Mathew | 9c708b5 | 2016-02-26 14:23:19 +0000 | [diff] [blame] | 73 | tzc400_enable_filters(); |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 74 | } |
| 75 | |
| 76 | void plat_arm_security_setup(void) |
| 77 | { |
Suyash Pathak | b71a9e6 | 2020-02-04 13:55:20 +0530 | [diff] [blame] | 78 | arm_tzc400_setup(PLAT_ARM_TZC_BASE, NULL); |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 79 | } |