Mario Bălănică | 3a946f3 | 2023-12-01 04:30:13 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016-2024, Arm Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <assert.h> |
| 8 | #include <inttypes.h> |
| 9 | #include <stdint.h> |
| 10 | |
| 11 | #include <arch_helpers.h> |
| 12 | #include <common/fdt_fixup.h> |
| 13 | #include <common/fdt_wrappers.h> |
| 14 | |
| 15 | #include <rpi_shared.h> |
| 16 | |
| 17 | /* |
| 18 | * Remove the FDT /memreserve/ entry that covers the region at the very |
| 19 | * beginning of memory (if that exists). This is where the secondaries |
| 20 | * originally spin, but we pull them out there. |
| 21 | * Having overlapping /reserved-memory and /memreserve/ regions confuses |
| 22 | * the Linux kernel, so we need to get rid of this one. |
| 23 | */ |
| 24 | static void remove_spintable_memreserve(void *dtb) |
| 25 | { |
| 26 | uint64_t addr, size; |
| 27 | int regions = fdt_num_mem_rsv(dtb); |
| 28 | int i; |
| 29 | |
| 30 | for (i = 0; i < regions; i++) { |
| 31 | if (fdt_get_mem_rsv(dtb, i, &addr, &size) != 0) { |
| 32 | return; |
| 33 | } |
| 34 | if (size == 0U) { |
| 35 | return; |
| 36 | } |
| 37 | /* We only look for the region at the beginning of DRAM. */ |
| 38 | if (addr != 0U) { |
| 39 | continue; |
| 40 | } |
| 41 | /* |
| 42 | * Currently the region in the existing DTs is exactly 4K |
| 43 | * in size. Should this value ever change, there is probably |
| 44 | * a reason for that, so inform the user about this. |
| 45 | */ |
| 46 | if (size == 4096U) { |
| 47 | fdt_del_mem_rsv(dtb, i); |
| 48 | return; |
| 49 | } |
| 50 | WARN("Keeping unknown /memreserve/ region at 0, size: %" PRId64 "\n", |
| 51 | size); |
| 52 | } |
| 53 | } |
| 54 | |
| 55 | static void rpi4_prepare_dtb(void) |
| 56 | { |
| 57 | void *dtb = (void *)rpi4_get_dtb_address(); |
| 58 | uint32_t gic_int_prop[3]; |
| 59 | int ret, offs; |
| 60 | |
| 61 | /* Return if no device tree is detected */ |
| 62 | if (fdt_check_header(dtb) != 0) |
| 63 | return; |
| 64 | |
| 65 | ret = fdt_open_into(dtb, dtb, 0x100000); |
| 66 | if (ret < 0) { |
| 67 | ERROR("Invalid Device Tree at %p: error %d\n", dtb, ret); |
| 68 | return; |
| 69 | } |
| 70 | |
| 71 | if (dt_add_psci_node(dtb)) { |
| 72 | ERROR("Failed to add PSCI Device Tree node\n"); |
| 73 | return; |
| 74 | } |
| 75 | |
| 76 | if (dt_add_psci_cpu_enable_methods(dtb)) { |
| 77 | ERROR("Failed to add PSCI cpu enable methods in Device Tree\n"); |
| 78 | return; |
| 79 | } |
| 80 | |
| 81 | /* |
| 82 | * Remove the original reserved region (used for the spintable), and |
| 83 | * replace it with a region describing the whole of Trusted Firmware. |
| 84 | */ |
| 85 | remove_spintable_memreserve(dtb); |
| 86 | if (fdt_add_reserved_memory(dtb, "atf@0", 0, 0x80000)) |
| 87 | WARN("Failed to add reserved memory nodes to DT.\n"); |
| 88 | |
| 89 | offs = fdt_node_offset_by_compatible(dtb, 0, "arm,gic-400"); |
| 90 | gic_int_prop[0] = cpu_to_fdt32(1); // PPI |
| 91 | gic_int_prop[1] = cpu_to_fdt32(9); // PPI #9 |
| 92 | gic_int_prop[2] = cpu_to_fdt32(0x0f04); // all cores, level high |
| 93 | fdt_setprop(dtb, offs, "interrupts", gic_int_prop, 12); |
| 94 | |
| 95 | offs = fdt_path_offset(dtb, "/chosen"); |
| 96 | fdt_setprop_string(dtb, offs, "stdout-path", "serial0"); |
| 97 | |
| 98 | ret = fdt_pack(dtb); |
| 99 | if (ret < 0) |
| 100 | ERROR("Failed to pack Device Tree at %p: error %d\n", dtb, ret); |
| 101 | |
| 102 | clean_dcache_range((uintptr_t)dtb, fdt_blob_size(dtb)); |
| 103 | INFO("Changed device tree to advertise PSCI.\n"); |
| 104 | } |
| 105 | |
| 106 | void plat_rpi_bl31_custom_setup(void) |
| 107 | { |
| 108 | rpi4_prepare_dtb(); |
| 109 | } |