| Andre Przywara | 2d8e99a | 2019-07-10 18:09:18 +0100 | [diff] [blame] | 1 | /* |
| Mario Bălănică | 3a946f3 | 2023-12-01 04:30:13 +0200 | [diff] [blame^] | 2 | * Copyright (c) 2019-2024, Arm Limited and Contributors. All rights reserved. |
| Andre Przywara | 2d8e99a | 2019-07-10 18:09:18 +0100 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | /* |
| 8 | * armstub8.bin header to let the GPU firmware recognise this code. |
| 9 | * It will then write the load address of the kernel image and the DT |
| 10 | * after the header magic in RAM, so we can read those addresses at runtime. |
| 11 | */ |
| 12 | |
| 13 | .text |
| 14 | b armstub8_end |
| 15 | |
| 16 | .global stub_magic |
| 17 | .global dtb_ptr32 |
| 18 | .global kernel_entry32 |
| 19 | |
| 20 | .org 0xf0 |
| 21 | armstub8: |
| 22 | stub_magic: |
| 23 | .word 0x5afe570b |
| 24 | stub_version: |
| 25 | .word 0 |
| 26 | dtb_ptr32: |
| 27 | .word 0x0 |
| 28 | kernel_entry32: |
| 29 | .word 0x0 |
| 30 | |
| 31 | /* |
| 32 | * Technically an offset of 0x100 would suffice, but the follow-up code |
| 33 | * (bl31_entrypoint.S at BL31_BASE) needs to be page aligned, so pad here |
| 34 | * till the end of the first 4K page. |
| 35 | */ |
| 36 | .org 0x1000 |
| 37 | armstub8_end: |